DS5002FP_06 Datasheet, PDF (23/25 Pages) Dallas Semiconductor – Secure Microprocessor Chip

Figure 14. Connection to 64k x 8 SRAM
DS5002FP Secure Microprocessor Chip
POWER MANAGEMENT
The DS5002FP monitors V_CC to provide power-fail reset, early warning power-fail interrupt, and switchover to
lithium backup. It uses an internal bandgap reference in determining the switch points. These are called V_PFW,
V_CCMIN, and V_LI respectively. When V_CC drops below V_PFW, the DS5002FP will perform an interrupt vector to location
2Bh if the power-fail warning was enabled. Full processor operation continues regardless. When power falls further
to V_CCMIN, the DS5002FP invokes a reset state. No further code execution is performed unless power rises back
above V_CCMIN. All decoded chip enables and the R/W signal go to an inactive (logic 1) state. V_CC is still the power
source at this time. When V_CC drops further to below V_LI, internal circuitry switch to the lithium cell for power. The
majority of internal circuits will be disabled and the remaining nonvolatile states will be retained. Any devices
connected V_CCO will be powered by the lithium cell at this time. V_CCO is at the lithium battery voltage minus
approximately 0.45V (less a diode drop). This drop varies depending on the load. Low-power SRAMs should be
used for this reason. When using the DS5002FP, the user must select the appropriate battery to match the RAM
data retention current and the desired backup lifetime. Note that the lithium cell is only loaded when V_CC < V_LI. The
Secure Microcontroller User’s Guide has more information on this topic. The trip points V_CCMIN and V_PFW are listed
in the electrical specifications.
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