DS26401 Datasheet, PDF (203/309 Pages) Dallas Semiconductor – Octal T1/E1/J1 Framer

DS26401 Octal T1/E1/J1 Framer
Register Name:
Register Description:
Register Address:
RHF
Receive HDLC FIFO Register
0B6h + (200h x n) : where n = 0 to 7, for Ports 1 to 8
Bit #
Name
Default
7
RHD7
0
6
RHD6
0
5
RHD5
0
4
RHD4
0
3
RHD3
0
2
RHD2
0
1
RHD1
0
0
RHD0
0
Bit 0 / Receive HDLC Data Bit 0 (RHD0). LSB of a HDLC packet data byte.
Bit 1 / Receive HDLC Data Bit 1 (RHD1)
Bit 2 / Receive HDLC Data Bit 2 (RHD2)
Bit 3 / Receive HDLC Data Bit 3 (RHD3)
Bit 4 / Receive HDLC Data Bit 4 (RHD4)
Bit 5 / Receive HDLC Data Bit 5 (RHD5)
Bit 6 / Receive HDLC Data Bit 6 (RHD6)
Bit 7 / Receive HDLC Data Bit 7 (RHD7). MSB of a HDLC packet data byte.
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