DS1330W Datasheet, PDF (2/11 Pages) Dallas Semiconductor – 3.3V 256K Nonvolatile SRAM with Battery Monitor

DS1330W
READ MODE
The DS1330W executes a read cycle whenever WE
(Write Enable) is inactive (high) and CE (Chip Enable)
and OE (Output Enable) are active (low). The unique
address specified by the 15 address inputs (A₀ – A₁₄)
defines which of the 32,768 bytes of data is to be
accessed. Valid data will be available to the eight data
output drivers within t_ACC (Access Time) after the last
address input signal is stable, providing that CE and OE
(Output Enable) access times are also satisfied. If OE
and CE access times are not satisfied, then data access
must be measured from the later occurring signal (CE or
OE) and the limiting parameter is either t_CO for CE or t_OE
for OE rather than address access.
WRITE MODE
The DS1330W excutes a write cycle whenever the WE
and CE signals are in the active (low) state after address
inputs are stable. The later occurring falling edge of CE
or WE will determine the start of the write cycle. The
write cycle is terminated by the earlier rising edge of CE
or WE. All address inputs must be kept valid throughout
the write cycle. WE must return to the high state for a
minimum recovery time (t_WR) before another cycle can
be initiated. The OE control signal should be kept inac-
tive (high) during write cycles to avoid bus contention.
However, if the output drivers are enabled (CE and OE
active) then WE will disable the outputs in t_ODW from its
falling edge.
DATA RETENTION MODE
The DS1330W provides full functional capability for V_CC
greater than 3.0 volts and write protects by 2.8 volts.
Data is maintained in the absence of V_CC without any
additional support circuitry. The nonvolatile static RAMs
constantly monitor V_CC. Should the supply voltage
decay, the NV SRAMs automatically write protect them-
selves, all inputs become “don’t care,” and all outputs
become high impedance. As V_CC falls below approxi-
mately 2.5 volts, the power switching circuit connects
the lithium energy source to RAM to retain data. During
power–up, when V_CC rises above approximately
2.5 volts, the power switching circuit connects external
V_CC to the RAM and disconnects the lithium energy
source. Normal RAM operation can resume after V_CC
exceeds 3.0 volts.
SYSTEM POWER MONITORING
The DS1330W has the ability to monitor the external
V_CC power supply. When an out–of–tolerance power
supply condition is detected, the NV SRAM warns a pro-
cessor–based system of impending power failure by
asserting RST. On power up, RST is held active for 200
ms nominal to prevent system operation during pow-
er–on transients and to allow t_REC to elapse. RST has
an open–drain output driver.
BATTERY MONITORING
The DS1330W automatically performs periodic battery
voltage monitoring on a 24 hour time interval. Such
monitoring begins within t_REC after V_CC rises above V_TP
and is suspended when power failure occurs.
After each 24 hour period has elapsed, the battery is
connected to an internal 1 MΩ test resistor for one
second. During this one second, if battery voltage falls
below the battery voltage trip point (2.6V), the battery
warning output BW is asserted. Once asserted, BW
remains active until the module is replaced. The battery
is still retested after each V_CC power–up, however, even
if BW is active. If the battery voltage is found to be higher
than 2.6V during such testing, BW is de–asserted and
regular 24–hour testing resumes. BW has an open–
drain output driver.
FRESHNESS SEAL
Each DS1330W is shipped from Dallas Semiconductor
with its lithium energy source disconnected, guarantee-
ing full energy capacity. When V_CC is first applied at a
level greater than V_TP, the lithium energy source is
enabled for battery backup operation.
PACKAGES
The 34–pin PowerCap Module integrates SRAM
memory and nonvolatile control into a module base
along with contacts for connection to the lithium battery
in the DS9034PC PowerCap. The PowerCap Module
package design allows a DS1330W device to be sur-
face mounted without subjecting its lithium backup bat-
tery to destructive high–temperature reflow soldering.
After a DS1330W module base is reflow soldered, a
DS9034PC is snapped on top of the base to form a com-
plete Nonvolatile SRAM module. The DS9034PC is
keyed to prevent improper attachment. DS1330W mod-
ule bases and DS9034PC PowerCaps are ordered sep-
arately and shipped in separate containers. See the
DS9034PC data sheet for further information.
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