DS3171 Datasheet, PDF (151/232 Pages) Dallas Semiconductor – Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers

DS3171/DS3172/DS3173/DS3174
Register Name:
Register Description:
Register Address:
BERT.SRIE
BERT Status Register Interrupt Enable
(0,2,4,6)70h
Bit #
15
14
13
12
11
10
9
8
Name
--
--
--
--
--
--
--
--
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Name
--
--
--
--
PMSIE
BEIE
BECIE
OOSIE
Default
0
0
0
0
0
0
0
0
Bit 3: Performance Monitoring Update Status Interrupt Enable (PMSIE) – This bit enables an interrupt if the
PMSL bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 2: Bit Error Interrupt Enable (BEIE) – This bit enables an interrupt if the BEL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 1: Bit Error Count Interrupt Enable (BECIE) – This bit enables an interrupt if the BECL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 0: Out Of Synchronization Interrupt Enable (OOSIE) – This bit enables an interrupt if the OOSL bit is set and
the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
15
BEC15
0
Bit #
Name
Default
7
BEC7
0
BERT.RBECR1
BERT Receive Bit Error Count Register #1
(0,2,4,6)74h
14
BEC14
0
13
BEC13
0
12
BEC12
0
11
BEC11
0
10
BEC10
0
6
BEC6
0
5
BEC5
0
4
BEC4
0
3
BEC3
0
2
BEC2
0
9
BEC9
0
1
BEC1
0
8
BEC8
0
0
BEC0
0
Bits 15 to 0: Bit Error Count (BEC[15:0]) – Lower sixteen bits of 24 bits. Register description follows next
register.
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