DS3171 Datasheet, PDF (118/232 Pages) Dallas Semiconductor – Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers

Table 11-2. Per Port Register Address Map
Port 1
040 to 1FF
Port 2
240 to 3FF
Port 3
440 to 5FF
Port 4
640 to 7FF
Address
offset
040 - 05F
060 – 07F
080 – 08B
08C – 08F
090 – 09F
0A0 – 0AF
0B0 – 0BF
0C0 – 0CF
0D0 – 0DF
0E0 – 0E7
0E8 – 0EF
0F0 – 0FF
100 – 117
118 – 11F
120 – 13F
140 – 1FF
Description
Port common registers
BERT
Reserved
B3ZS/HDB3 transmit line encoder
B3ZS/HDB3 receive line decoder
HDLC Transmit
HDLC Receive
FEAC Transmit
FEAC Receive
Reserved
Trail Trace Transmit
Trail Trace Receive
Reserved
DS3/E3 Framer Transmit
DS3/E3 Framer Receive
Reserved
DS3171/DS3172/DS3173/DS3174
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