DS80C310_09 Datasheet, PDF (15/22 Pages) Dallas Semiconductor – High-Speed Microcontroller

DS80C310
Note 2: Address is held in a weak latch until overdriven by external memory.
EXTERNAL CLOCK CHARACTERISTICS
PARAMETER
SYMBOL
MIN
Clock High Time
Clock Low Time
Clock Rise Time
Clock Fall Time
t_CHCX
10
t_CLCX
10
t_CLCL
t_CHCL
TYP
MAX
5
5
UNITS
ns
ns
ns
ns
SERIAL PORT MODE 0 TIMING CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
MIN
Serial Port Clock Cycle
Time
t_XLXL
SM2 = 0, 12 clocks per cycle
SM2 = 1, 4 clocks per cycle
Output Data Setup to
Clock Rising
t_QVXH
SM2 = 0, 12 clocks per cycle
SM2 = 1, 4 clocks per cycle
TYP
12t_CLCL
4t_CLCL
MAX
10t_CLCL
3t_CLCL
UNITS
ns
ns
Output Data Hold from
Clock Rising
t_XHQX
SM2 = 0, 12 clocks per cycle
SM2 = 1, 4 clocks per cycle
2t_CLCL
t_CLCL
ns
Input Data Hold after
Clock Rising
t_XHDX
SM2 = 0, 12 clocks per cycle
t_CLCL
ns
SM2 = 1, 4 clocks per cycle
t_CLCL
Clock Rising Edge to
Input Data Valid
t_XHDV
SM2 = 0, 12 clocks per cycle
SM2 = 1, 4 clocks per cycle
11t_CLCL
3t_CLCL
ns
DEFINITION OF AC SYMBOLS
In an effort to remain compatible with the original 8051 family, this device specifies the same parameters
as such devices, using the same symbols. For completeness, the following are description of the symbols.
t
Time
A Address
C Clock
D Input Data
H Logic Level High
L Logic Level Low
I
Instruction
P
PSEN
Q Output Data
R
RD _Signal
V Valid
W ^WR Signal
X No longer a valid logic level
Z Tri-State
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