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DS80C310_1 Datasheet, PDF (13/21 Pages) Dallas Semiconductor – High-Speed Micro | |||
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DS80C310
MOVX CHARACTERISTICS
(0°C to 70°C; VCC=4.0V to 5.5V)
VARIABLE CLOCK
PARAMETER
SYMBOL
MIN
MAX
UNITS STRETCH
Data Access ALE Pulse Width
tLLHL2
1.5tCLCLâ5
2tCLCLâ5
ns
tMCS=0
tMCS>0
Address Hold after ALE Low for
MOVX Write
tLLAX2
0.5tCLCLâ5
tCLCLâ5
ns
tMCS=0
tMCS>0
RD Pulse Width
tRLRH
2tCLCLâ5
tMCSâ10
ns
tMCS=0
tMCS>0
WR Pulse Width
tWLWH
2tCLCLâ5
tMCSâ10
ns
tMCS=0
tMCS>0
RD Low to Valid Data In
tRLDV
2tCLCLâ20
tMCSâ20
ns
tMCS=0
tMCS>0
Data Hold after Read
tRHDX
0
ns
Data Float after Read
tRHDZ
tCLCLâ5
2tCLCLâ5
ns
tMCS=0
tMCS>0
ALE Low to Valid Data In
tLLDV
2.5tCLCLâ20
ns
tCLCL+tMCSâ40
tMCS=0
tMCS>0
Port 0 Address to Valid Data In
tAVDV1
3tCLCLâ20
ns
1.5tCLCL+tMCSâ20
tMCS=0
tMCS>0
Port 2 Address to Valid Data In
tAVDV2
3.5tCLCLâ20
ns
2tCLCL+tMCSâ20
tMCS=0
tMCS>0
ALE Low to RD or WR Low
tLLWL
0.5tCLCLâ5
tCLCLâ5
0.5tCLCL+5
tCLCL+5
ns
tMCS=0
tMCS>0
Port 0 Address to RD or WR Low
tAVWL1
tCLCLâ5
2tCLCLâ5
ns
tMCS=0
tMCS>0
Port 2 Address to RD or WR Low
tAVWL2
1.5tCLCLâ10
2.5tCLCLâ10
ns
tMCS=0
tMCS>0
Data Valid to WR Transition
tQVWX
â5
ns
tMCS=0
Data Hold after Write
tWHQX
tCLCLâ5
2tCLCLâ5
ns
tMCS=0
tMCS>0
RD Low to Address Float
tRLAZ
â0.5tCLCLâ5
ns
RD or WR High to ALE High
tWHLH
0
tCLCLâ5
10
tCLCL+5
ns
tMCS=0
tMCS>0
NOTE: tMCS is a time period related to the Stretch memory cycle selection. The following table shows the value of
tMCS for each Stretch selection.
M2
M1
M0
0
0
0
MOVX CYCLES
2 machine cycles
tMCS
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
3 machine cycles (default)
4 machine cycles
5 machine cycles
6 machine cycles
7 machine cycles
8 machine cycles
9 machine cycles
4 tCLCL
8 tCLCL
12 tCLCL
16 tCLCL
20 tCLCL
24 tCLCL
28 tCLCL
031296 13/21
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