MTC2402Q8 Datasheet, PDF (8/13 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode MOSFET

CYStech Electronics Corp.
Spec. No. : C568Q8
Issued Date : 2012.05.02
Revised Date : 2013.11.01
Page No. : 8/13
Typical Characteristics(Cont.) : Q2(P-channel)
Capacitance vs Drain-to-Source Voltage
10000
1.6
Ciss
1.4
Threshold Voltage vs Junction Tempearture
ID=-250μA
1000
100
1.2
C _oss
1
0.8
Crss
0.6
10
0.1
1
10
100
-VDS, Drain-Source Voltage(V)
Forward Transfer Admittance vs Drain Current
100
Pulsed
Ta=25°C
10
VDS=5V
1
0.4
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj, Junction Temperature(°C)
Gate Charge Characteristics
5
VDS=-10V
4
ID=-5A
3
2
0.1
1
0.01
0.001 0.01
0.1
1
10
100
ID, Drain Current(A)
Maximum Safe Operating Area
100
100μs
10
1ms
10ms
1
100ms
DC
0.1
TA=25°C, Tj=150°C, VGS=-
4.5V, RθJA=50°C/W, Single
Pl
0.01
0.01
0.1
1
10
100
-VDS, Drain-Source Voltage(V)
0
0
4
8
12
16
20
Qg, Total Gate Charge(nC)
Maximum Drain Current vs JunctionTemperature
10
9
8
7
6
5
4
3
2
1 _{TA=25°C, VGS=-4.5V, RθJA=50°C/W}
0
25
50
75
100 125 150 175
Tj, Junction Temperature(°C)
MTC2402Q8
CYStek Product Specification