MTC2402Q8 Datasheet, PDF (4/13 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode MOSFET

CYStech Electronics Corp.
Spec. No. : C568Q8
Issued Date : 2012.05.02
Revised Date : 2013.11.01
Page No. : 4/13
Typical Characteristics : Q1( N-channel )
40
35
30
25
20
15
10
5
0
0
Typical Output Characteristics
VGS=3V
10V, 9V,8V,7V,6V, 5V, 4V
VGS=2V
VGS=1.5V
1
2
3
4
VDS, Drain-Source Voltage(V)
Brekdown Voltage vs Ambient Temperature
1.4
1.2
1
0.8
0.6
ID=250μA,
VGS=0V
0.4
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
1000
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1.2
VGS=0V
1
Tj=25°C
0.8
100
VGS=1.8V VGS=2.5V ^{VGS=3V VGS=4.5V}
0.6
Tj=150°C
10
0.01
VGS=10V
0.1
1
10
ID, Drain Current(A)
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
200
180
160
140
120
100
80
ID=8A
60
ID=5.2A
40
20
0
0
2
4
6
8
10
VGS, Gate-Source Voltage(V)
0.4
0.2
0
2
4
6
8
10
IDR, Reverse Drain Current(A)
Drain-Source On-State Resistance vs Junction Tempearture
1.8
1.6
VGS=4.5V, ID=8A
1.4
1.2
1
VGS=2.5V, ID=5.2A
0.8
0.6
0.4
-60
-20 20
60
100 140 180
Tj, Junction Temperature(°C)
MTC2402Q8
CYStek Product Specification