BTD1857AJ3G Datasheet, PDF (6/8 Pages) Cystech Electonics Corp. – Silicon NPN Epitaxial Planar Transistor

CYStech Electronics Corp.
TO-252AB Dimension
Spec. No. : C855J3G
Issued Date : 2004.10.04
Revised Date :2010.12.08
Page No. : 6/7
Marking:
4
Device
Name
HFE
Rank
D1857A
□ □□ ^Date
Code
3-Lead TO-252AB Plastic Surface Mount Package
CYStek Package Code: J3
Style: Pin 1.Base 2.Collector 3.Emitter
4.Collector
*: Typical
DIM
Inches
Min. Max.
Millimeters
Min. Max.
DIM
Inches
Min. Max.
Millimeters
Min. Max.
A 0.087 0.094 2.200 2.400 e
*0.091
*2.300
A1 0.000 0.005 0.000 0.127 e1 0.177 0.185 4.500 4.700
B 0.053 0.065 1.350 1.650 H
0.118 REF
3.000 REF
b 0.020 0.028 0.500 0.700 K
0.197 REF
5.000 REF
b1 0.028 0.035 0.700 0.900 L 0.374 0.390 9.500 9.900
C 0.017 0.023 0.430 0.580 L1 0.100 0.114 2.550 2.900
C1 0.017 0.023 0.430 0.580 L2 0.055 0.070 1.400 1.780
D 0.250 0.262 6.350 6.650 L3 0.024 0.035 0.600 0.900
D1 0.205 0.213 5.200 5.400 P
0.028 REF
0.700 REF
E 0.213 0.224 5.400 5.700 V
0.209 REF
5.300 REF
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead : Pure tin plated
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
BTD1857AJ3G
CYStek Product Specification