|
MB91460T Datasheet, PDF (97/137 Pages) Cypress Semiconductor – 32-bit RISC, load/store architecture, five-stage pipeline | |||
|
◁ |
MB91460T Series
16.3 DC characteristics
Note: In the following tables, âVDDâ means VDD35 for pins of ext. bus or VDD5 for other pins.
In the following tables, âVSSâ means VSS5 for all pins.
(VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = 0 V, TA = ï40 °C to TA(max))
Parameter Symbol Pin name
Condition
Value
Unit
Min
Typ
Max
Remarks
Port inputs if CMOS
CMOS
â
Hysteresis 0.8/0.2
0.8 ï´ï VDD â VDD + 0.3 V hysteresis
input is selected
input
VIH
Input âHâ
voltage
Port inputs if CMOS 0.7 ï´ï VDD â VDD + 0.3 V 4.5 V < VDD < 5.5 V
â
Hysteresis 0.7/0.3
input is selected
0.74 ï´ï VDD â VDD + 0.3 V 3 V < VDD < 4.5 V
AUTOMOTIVE
â
Hysteresis input is
0.8 ï´ï VDD â VDD + 0.3 V
selected
â
Port inputs if TTL
input is selected
2.0
â VDD + 0.3 V
VIHR
INITX
â
0.8 ï´ï VDD
â
VDD + 0.3
V
INITX input pin
(CMOS Hysteresis)
VIHM MD_2 to MD_0
â
VIHX0S
X0, X0A
â
VDD - 0.3 â VDD + 0.3 V Mode input pins
2.5
â
VDD + 0.3
V
External clock in
âOscillation modeâ
VIHX0F
X0
â
0.8 ï´ï VDD
â
VDD + 0.3
V
External clock in âFast
Clock Input modeâ
Port inputs if CMOS
â
Hysteresis 0.8/0.2
VSS - 0.3 â 0.2 ï´ï VDD V
input is selected
VIL
Input âLâ
voltage
Port inputs if CMOS
â
Hysteresis 0.7/0.3
VSS - 0.3 â 0.3 ï´ï VDD V
input is selected
Port inputs if
VSS - 0.3 â 0.5 ï´ï VDD V 4.5 V < VDD < 5.5 V
â
AUTOMOTIVE
Hysteresis input is
selected
VSS - 0.3 â 0.46 ï´ï VDD V 3 V < VDD < 4.5 V
â
Port inputs if TTL
input is selected
VSS - 0.3 â
0.8
V
VILR
INITX
â
VSS - 0.3
â
0.2 ï´ï VDD
V
INITX input pin
(CMOS Hysteresis)
VILM MD_2 to MD_0
â
VILXDS
X0, X0A
â
VSS - 0.3 â VSS + 0.3 V Mode input pins
VSS - 0.3 â
0.5
V
External clock in
âOscillation modeâ
Document Number: 002-04631 Rev. *A
Page 97 of 137
|
▷ |