MB91460T Datasheet, PDF (85/137 Pages) Cypress Semiconductor – 32-bit RISC, load/store architecture, five-stage pipeline

MB91460T Series
Interrupt
PPG 4
PPG 5
Reserved
Reserved
PPG 8
PPG 9
PPG 10
PPG 11
PPG 12
PPG 13
PPG 14
PPG 15
Up/Down Counter 0
Up/Down Counter 1
Up/Down Counter 2
Up/Down Counter 3
Real Time Clock
Calibration Unit
A/D Converter 0
-
Reserved
Reserved
Low Voltage Detection
Reserved
Timebase Overflow
PLL Clock Gear
DMA Controller
Main/Sub OSC stability wait
Security vector
Interrupt number
Decimal
Hexa-
decimal
116
74
117
75
118
76
119
77
120
78
121
79
122
7A
123
7B
124
7C
125
7D
126
7E
127
7F
128
80
129
81
130
82
131
83
132
84
133
85
134
86
135
87
136
88
137
89
138
8A
139
8B
140
8C
141
8D
142
8E
143
8F
144
90
Interrupt level ^*1
Setting
Register
Register
address
ICR50
472_H
ICR51
473_H
ICR52
474_H
ICR53
475_H
ICR54
476_H
ICR55
477_H
ICR56
478_H
ICR57
479_H
ICR58
47A_H
ICR59
47B_H
ICR60
47C_H
ICR61
47D_H
ICR62
47E_H
ICR63
-
47F_H
-
Interrupt vector ^*2
Offset
Default
Vector
address
22C_H
228_H
224_H
220_H
21C_H
218_H
214_H
210_H
20C_H
208_H
204_H
200_H
1FC_H
1F8_H
1F4_H
1F0_H
1EC_H
1E8_H
1E4_H
1E0_H
1DC_H
1D8_H
1D4_H
1D0_H
1CC_H
1C8_H
1C4_H
1C0_H
1BC_H
000FFE2C
000FFE28
000FFE24
000FFE20
000FFE1C
000FFE18
000FFE14
000FFE10
000FFE0C
000FFE08
000FFE04
000FFE00
000FFDFC
000FFDF8
000FFDF4
000FFDF0
000FFDEC
000FFDE8
000FFDE4
000FFDE0
000FFDDC
000FFDD8
000FFDD4
000FFDD0
000FFDCC
000FFDC8
000FFDC4
000FFDC0
000FFDBC
DMA ^*3
Resource
Number
100
101
102
103
104
105
106
107
108
109
110
111
-
-
-
-
-
-
14, 112
-
-
-
-
-
-
-
-
-
-
Document Number: 002-04631 Rev. *A
Page 85 of 137