W40S01-04 Datasheet, PDF (8/10 Pages) Cypress Semiconductor – SDRAM Buffer - 4 DIMM

W40S01-04
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability
Parameter
V_DD, V_IN
T_STG
T_A
T_B
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
DC Electrical Characteristics: T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5%
Parameter
Description
Test Condition/
Comments
Min
Typ
Max
Unit
I_DD
3.3V Supply Current
BUF_IN = 100 MHz
320
mA
I_{DD Tristate}
3.3V Supply Current in Three-state
BUF_IN = 100 MHz
5
mA
Logic Inputs (BUF_IN, OE, SCLOCK, SDATA)
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_ILEAK
Input Leakage Current, BUF_IN
I_ILEAK
Input Leakage Current^[3]
Logic Outputs (SDRAM0:17)^[4]
GND–0.3
2.0
–5
–20
0.8
V
V_DDQ3+0.5 V
+5
µA
+5
µA
V_OL
Output Low Voltage
V_OH
Output High Voltage
I_OL
Output Low Current
I_OH
Output High Current
Pin Capacitance/Inductance
I_OL = 1 mA
I_OH = –1 mA
V_OL = 1.5V
V_OH = 1.5V
3.1
70
110
65
100
50
mV
V
185
mA
160
mA
C_IN
Input Pin Capacitance (Except
BUF_IN)
5
pF
C_OUT
Output Pin Capacitance
L_IN
Input Pin Inductance
Notes:
3. OE, SCLOCK, and SDATA logic pins have a 250-kΩ internal pull-up resistor (not CMOS level).
4. Outputs loaded by 6" 60Ω transmission lines with 20-pF capacitors.
6
pF
7
nH
8