CYK256K16SCCB Datasheet, PDF (8/10 Pages) Cypress Semiconductor – 4-Mbit (256K x 16) Pseudo Static RAM

Switching Waveforms (continued)
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)^{[18, 19]}
tWC
ADDRESS
CYK256K16SCCB
CE₁
CE2
BHE/BLE
WE
DATA I/O
tSA
DON’T CARE
tSCE
tAW
tHA
tBW
tPWE
tSD
VALID DATA
t_{HD tHD}
Truth Table^[20]
CE₁ CE₂ WE
H
X
X
X
L
X
X
X
X
L
H
H
L
H
H
L
H
H
L
H
H
L
H
H
L
H
H
L
H
L
L
H
L
L
H
L
OE BHE BLE
Inputs/Outputs
Mode
Power
X
X
X High Z
Deselect/Power-down
Standby (I_SB)
X
X
X High Z
Deselect/Power-down
Standby (I_SB)
X
H
H High Z
Deselect/Power-down
Standby (I_SB)
L
L
L Data Out (I/O₀–I/O₁₅) Read (Upper Byte and Lower Active (I_CC)
Byte)
L
H
L Data Out (I/O₀–I/O₇); Read (Upper Byte only)
I/O₈–I/O₁₅ in High Z
Active (I_CC)
L
L
H Data Out (I/O₈–I/O₁₅); Read (Lower Byte only)
I/O₀–I/O₇ in High Z
Active (I_CC)
H
L
L High Z
Output Disabled
Active (I_CC)
H
H
L High Z
Output Disabled
Active (I_CC)
H
L
H High Z
Output Disabled
Active (I_CC)
X
L
L Data In (I/O₀–I/O₁₅)
Write (Upper Byte and Lower Active (I_CC)
Byte)
X
H
L Data In (I/O₀–I/O₇);
Write (Lower Byte Only)
I/O₈–I/O₁₅ in High Z
X
L
H Data In (I/O₈–I/O₁₅);
Write (Upper Byte Only)
I/O₀ –I/O₇ in High Z
Active (I_CC)
Active (I_CC)
Note:
20. H = Logic HIGH, L = Logic LOW, X = Don’t Care.
Document #: 38-05526 Rev. *H
Page 8 of 10
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