CYK256K16SCCB Datasheet, PDF (5/10 Pages) Cypress Semiconductor – 4-Mbit (256K x 16) Pseudo Static RAM

CYK256K16SCCB
Switching Characteristics (Over the Operating Range)^[10] (continued)
Parameter
Description
t_PWE
t_BW
t_SD
t_HD
t_HZWE
t_LZWE
WE Pulse Width
BLE/BHE LOW to Write End
Data Set-up to Write End
Data Hold from Write End
WE LOW to High Z^{[11, 12]}
WE HIGH to Low Z^{[11, 12]}
–55
Min.
Max.
40
50
25
0
25
5
–60
Min.
Max.
40
50
25
0
25
5
–70
Min.
Max. Unit
45
ns
55
ns
25
ns
0
ns
25
ns
5
ns
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)^{[14, 15, 16]}
t_RC
ADDRESS
DATA OUT
t_SK
tAA
tOHA
PREVIOUS DATA VALID
DATA VALID
Read Cycle 2 (OE Controlled)^{[14, 16]}
ADDRESS
CE₁
t_SK
t_RC
CE₂
BHE/BLE
t_ACE
t_LZBE
t_DBE
OE
DATA OUT
t_DOE
t_LZOE
HIGH IMPEDANCE
t_LZCE
Notes: ^VCC
t_PU
15. Device is continuously selected. OE, CE = V_IL.
16. WE is HIGH for Read Cycle.
t_HZCE
t_HZBE
t_HZOE
DATA VALID
HIGH
IMPEDANCE
I_CC
Document #: 38-05526 Rev. *H
Page 5 of 10
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