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CY8C34_13 Datasheet, PDF (79/130 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)
PSoC® 3: CY8C34 Family Datasheet
11.4.3 USBIO
For operation in GPIO mode, the standard range for VDDD applies, see Device Level Specifications on page 67.
Table 11-13. USBIO DC Specifications
Parameter
Rusbi
Rusba
Vohusb
Volusb
Vihgpio
Vilgpio
Vohgpio
Volgpio
Vdi
Vcm
Vse
Rps2
Rext
Zo
CIN
IIL[44]
Description
USB D+ pull-up resistance
USB D+ pull-up resistance
Static output high
Static output low
Input voltage high, GPIO mode
Input voltage low, GPIO mode
Output voltage high, GPIO mode
Output voltage low, GPIO mode
Differential input sensitivity
Differential input common mode
range
Single ended receiver threshold
PS/2 pull-up resistance
External USB series resistor
Conditions
With idle bus
While receiving traffic
15 kΩ ±5% to VSS, internal pull-up
enabled
15 kΩ ±5% to VSS, internal pull-up
enabled
VDDD ≥ 3 V
VDDD ≥ 3 V
IOH = 4 mA, VDDD ≥ 3 V
IOL = 4 mA, VDDD ≥ 3 V
|(D+) – (D–)|
In PS/2 mode, with PS/2 pull-up
enabled
In series with each USB pin
USB driver output impedance
USB transceiver input capacitance
Input leakage current (absolute
value)
Including Rext
25 °C, VDDD = 3.0 V
Min
0.900
1.425
2.8
–
2
–
2.4
–
–
0.8
0.8
3
21.78
(–1%)
28
–
–
Typ
Max
–
1.575
–
3.090
–
3.6
–
0.3
–
–
–
0.8
–
–
–
0.3
–
0.2
–
2.5
–
2
–
7
22
22.22
(+1%)
–
44
–
20
–
2
Units
kΩ
kΩ
V
V
V
V
V
V
V
V
V
kΩ
Ω
Ω
pF
nA
Figure 11-20. USBIO Output High Voltage and Current, GPIO
Mode
Figure 11-21. USBIO Output Low Voltage and Current, GPIO
Mode
Note
44. Based on device characterization (Not production tested).
Document Number: 001-53304 Rev. *Q
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