CY8C36 Datasheet, PDF (73/99 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC)

PRELIMINARY
PSoC^®3: CY8C36 Family Data Sheet
Table 11-25. IDAC (Current Digital-to-Analog Converter) DC Specifications (continued)
Parameter
INL
DNL
Ezs
Eg
IDAC_ICC
IDAC_ICC
Description
Integral non linearity
Differential non linearity
Zero scale error
Gain error
DAC current low speed mode^[10]
DAC current high speed mode^[10]
Conditions
RL 600Ω, CL=15 pF
RL 600Ω, CL=15 pF
Uncompensated
Temperature compensated
Code = 0
Code = 0
Min
Typ
Max
-
-
±1
-
-
±0.5
-
0
±1
-
-
2.5
-
-
TBD
-
-
100
-
-
500
Table 11-26. IDAC (Current Digital-to-Analog Converter) AC Specifications
Parameter
Fdac
Description
Update rate
Settling time to 0.5LSB
Tsettle
Fast mode
Slow mode
Conditions
Min
Typ
Max
-
-
8
Full scale transition, 600Ω load,
CL = 15 pF
Independent of IDAC range setting -
(Iout)
-
100
Independent of IDAC range setting -
(Iout)
-
1000
11.5.7 VDAC
Table 11-27. VDAC (Voltage Digital-to-Analog Converter) DC Specifications
Parameter
Rout
Vout
INL
DNL
Ezs
Eg
VDAC_ICC
VDAC_ICC
Description
Output resistance^[10]
High
Low
Output voltage range^[10]
High
Low
Integral non linearity
Differential non linearity
Zero scale error
Gain error
DAC current low speed mode^[10]
DAC current high speed mode^[10]
Conditions
Vout = 4V
Vout = 1V
Code = 255, Vdda > 5V
Code = 255
CL=15 pF
CL=15 pF
Uncompensated
Temperature compensated
Code = 0
Code = 0
Min
Typ
Max
-
16
-
-
4
-
-
4
-
-
1
-
-
-
±1.6
-
-
±1
-
-
±1
-
-
3
-
-
TBD
-
-
100
-
-
500
Units
LSB
LSB
LSB
%
%
µA
µA
Units
Msps
ns
ns
Units
kΩ
kΩ
V
V
LSB
LSB
LSB
%
%
µA
µA
Table 11-28. VDAC (Voltage Digital-to-Analog Converter) AC Specifications
Parameter
Fdac
Tsettle
Description
Update rate^[10]
Update rate^[10]
Settling time to 0.5LSB^[10]
High^[10]
Low^[10]
Conditions
1V mode
4V mode
Full scale transition, CL = 15 pF
Vout = 4V
Vout = 1V
Min Typ
-
-
-
-
-
-
-
-
Max
1
250
4000
1000
Units
Msps
Ksps
ns
ns
Document Number: 001-53413 Rev. *B
Page 73 of 99
[+] Feedback