CY8C36 Datasheet, PDF (61/99 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC)

PRELIMINARY
PSoC^®3: CY8C36 Family Data Sheet
11.2 Device Level Specifications
Specifications are valid for -40°C ≤ Ta ≤ 85°C and Tj ≤ 100°C, except where noted. Specifications are valid for 1.71V to 5.5V, except
where noted.
11.2.1 Device Level Specifications
Table 11-2. DC Specifications
Parameter
Description
Conditions
Vdda
Analog supply voltage and input to Analog core regulator enabled
analog core regulator
Vdda
Analog supply voltage, analog
regulator bypassed
Analog core regulator disabled
Vddd
Digital supply voltage relative to
Vssd
Digital core regulator enabled
Vddd
Vddio^[7]
Digital supply voltage, digital
regulator bypassed
Digital core regulator disabled
I/O supply voltage relative to Vssio
Vcca
Direct analog core voltage input
(Analog regulator bypass)
Analog core regulator disabled
Vccd
Direct digital core voltage input
(Digital regulator bypass)
Digital core regulator disabled
Vbat
Voltage supplied to boost converter
Idd^[8]
Active Mode, VDD = 1.71V - 5.5V
Execute from Flash, CPU at 1 MHz T= -40°C
T= 25°C
T= 85°C
Execute from Flash, CPU at 6 MHz T= -40°C
T= 25°C
T= 85°C
Execute from Flash, CPU at 12 MHz T= -40°C
T= 25°C
T= 85°C
Execute from Flash, CPU at 24 MHz T= -40°C
T= 25°C
T= 85°C
Execute from Flash, CPU at 48 MHz T= -40°C
T= 25°C
T= 85°C
Execute from Flash, CPU at 67 MHz T= -40°C
T= 25°C
T= 85°C
Min Typ Max Units
1.8
5.5
V
1.71 1.8 1.89
V
1.8
Vdda
V
1.71 1.8 1.89
V
1.71
Vdda
V
1.71 1.8 1.89
V
1.71 1.8 1.89
V
0.5
5.5
V
mA
0.57
mA
mA
mA
1.2
mA
mA
mA
2.1
mA
mA
mA
3.7
mA
mA
mA
6.7
mA
mA
mA
9.6
mA
mA
Document Number: 001-53413 Rev. *B
Page 61 of 99
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