MB91460H Datasheet, PDF (72/105 Pages) Cypress Semiconductor – 32-bit RISC, load/store architecture, five-stage pipeline

MB91460H Series
14.2 Clock Modulator settings
The following table shows all possible settings for the Clock Modulator in a base clock frequency range from 32MHz up to 88MHz.
The Flash access time settings need to be adjusted according to Fmax while the PLL and clockgear settings should be set according
to base clock frequency.
Clock Modulator settings, frequency range and supported supply voltage
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
1
3
026F
88
79.5
1
3
026F
84
76.1
1
3
026F
80
72.6
1
5
02AE
80
68.7
2
3
046E
80
68.7
1
3
026F
76
69.1
1
5
02AE
76
65.3
1
7
02ED
76
62
2
3
046E
76
65.3
3
3
066D
76
62
1
3
026F
72
65.5
1
5
02AE
72
62
1
7
02ED
72
58.8
2
3
046E
72
62
3
3
066D
72
58.8
1
3
026F
68
62
1
5
02AE
68
58.7
1
7
02ED
68
55.7
1
9
032C
68
53
2
3
046E
68
58.7
2
5
04AC
68
53
3
3
066D
68
55.7
4
3
086C
68
53
1
3
026F
64
58.5
1
5
02AE
64
55.3
1
7
02ED
64
52.5
1
9
032C
64
49.9
1
11
036B
64
47.6
2
3
046E
64
55.3
2
5
04AC
64
49.9
3
3
066D
64
52.5
4
3
086C
64
49.9
5
3
0A6B
64
47.6
1
3
026F
60
54.9
Fmax
[MHz]
98.5
93.8
89.1
95.8
95.8
84.5
90.8
98.1
90.8
98.1
79.9
85.8
92.7
85.8
92.7
75.3
80.9
87.3
95
80.9
95
87.3
95
70.7
75.9
82
89.1
97.6
75.9
89.1
82
89.1
97.6
66.1
Document Number: 002-04621 Rev. *A
Page 72 of 105