MB91460H Datasheet, PDF (54/105 Pages) Cypress Semiconductor – 32-bit RISC, load/store architecture, five-stage pipeline

MB91460H Series
Address
000640_H
000644_H
000648_H
00064C_H
000650_H
000654_H
000658_H
00065C_H
000660_H
000664_H
000668_H
00066C_H
000670_H
000674_H
000678_H
00067C_H
000680_H
000684_H
000688_H
to 0007F8_H
0007FC_H
000800_H
to 000CFC_H
Register
+0
+1
+2
+3
ASR0 [R/W]
00000000 00000000
ACR0 [R/W]
1111**00 00000000^*2
ASR1 [R/W]
XXXXXXXX XXXXXXXX
ACR1 [R/W]
XXXXXXXX XXXXXXXX
ASR2 [R/W]
XXXXXXXX XXXXXXXX
ACR2 [R/W]
XXXXXXXX XXXXXXXX
ASR3 [R/W]
XXXXXXXX XXXXXXXX
ACR3 [R/W]
XXXXXXXX XXXXXXXX
ASR4 [R/W]
XXXXXXXX XXXXXXXX
ACR4 [R/W]
XXXXXXXX XXXXXXXX
ASR5 [R/W]
XXXXXXXX XXXXXXXX
ACR5 [R/W]
XXXXXXXX XXXXXXXX
ASR6 [R/W]
XXXXXXXX XXXXXXXX
ACR6 [R/W]
XXXXXXXX XXXXXXXX
ASR7 [R/W]
XXXXXXXX XXXXXXXX
ACR7 [R/W]
XXXXXXXX XXXXXXXX
AWR0 [R/W]
01111111 11111*11
AWR1 [R/W]
XXXXXXXX XXXXXXXX
AWR2 [R/W]
XXXXXXXX XXXXXXXX
AWR3 [R/W]
XXXXXXXX XXXXXXXX
AWR4 [R/W]
XXXXXXXX XXXXXXXX
AWR5 [R/W]
XXXXXXXX XXXXXXXX
AWR6 [R/W]
XXXXXXXX XXXXXXXX
AWR7 [R/W]
XXXXXXXX XXXXXXXX
MCRA [R/W]
XXXXXXXX
MCRB [R/W]
XXXXXXXX
Reserved
Reserved
IOWR0 [R/W]
XXXXXXXX
IOWR1 [R/W]
XXXXXXXX
IOWR2 [R/W]
XXXXXXXX
IOWR3 [R/W]
XXXXXXXX
Reserved
CSER [R/W]
00000001
CHER [R/W]
11111111
Reserved
TCR [R/W]
0000**** ^*3
RCRH [R/W]
00XXXXXX
RCRL [R/W]
XXXX0XXX
Reserved
Reserved
Reserved
MODR [W]
XXXXXXXX
Reserved
Reserved
Block
External Bus
Unit
External Bus Unit
Mode Register
Reserved
Document Number: 002-04621 Rev. *A
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