MB91460H Datasheet, PDF (1/105 Pages) Cypress Semiconductor – 32-bit RISC, load/store architecture, five-stage pipeline

MB91460H Series
FR60 32-bit Microcontroller
MB91460H series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control applications which require
high-speed real-time processing, such as consumer devices and on-board vehicle systems. This series uses the FR60 CPU, which
is compatible with the FR family of CPUs.
This series contains the LIN-USART and CAN controllers.
Features
FR60 CPU core
■ 32-bit RISC, load/store architecture, five-stage pipeline
■ 16-bit fixed-length instructions (basic instructions)
■ Instruction execution speed: 1 instruction per cycle
■ Instructions including memory-to-memory transfer, bit
manipulation, and barrel shift instructions: Instructions suitable
for embedded applications
■ Function entry/exit instructions and register data multi-load
store instructions : Instructions supporting C language
■ Register interlock function: Facilitating assembly-language
coding
■ Built-in multiplier with instruction-level support
❐ Signed 32-bit multiplication: 5 cycles
❐ Signed 16-bit multiplication: 3 cycles
■ Interrupts (save PC/PS) : 6 cycles (16 priority levels)
■ Harvard architecture enabling program access and data
access to be performed simultaneously
■ Instructions compatible with the FR family
Internal peripheral resources
■ General-purpose ports : Maximum 108 ports
■ DMAC (DMA Controller)
❐ Maximum of 5 channels able to operate simultaneously
❐ 2 transfer sources (internal peripheral/software)
❐ Activation source can be selected using software
❐ Addressing mode specifies full 32-bit addresses
(increment/decrement/fixed)
❐ Transfer mode (demand transfer/burst transfer/step
transfer/block transfer)
❐ Transfer data size selectable from 8/16/32-bit
❐ Multi-byte transfer enabled (by software)
❐ DMAC descriptor in I/O areas (200_H to 240_H, 1000_H to 1024_H)
■ A/D converter (successive approximation type)
❐ 10-bit resolution: maximum 32 channels
❐ Conversion time: minimum 1 s
■ External interrupt inputs : maximum 16 channels
❐ 3 channels shared with CAN RX or I²C pins
■ Bit search module (for REALOS)
❐ Function to search the first bit position of “1”, “0”, “changed”
from the MSB (most significant bit) within one word
■ LIN-USART (full duplex double buffer): 4 or 7 channels
❐ Clock synchronous/asynchronous selectable
❐ Sync-break detection
❐ Internal dedicated baud rate generator
■ I²C bus interface (supports 400 kbps): 2 channels
❐ Master/slave transmission and reception
❐ Arbitration function, clock synchronization function
■ CAN controller (C-CAN): 1 channel
❐ Maximum transfer speed: 1 Mbps
❐ 32 transmission/reception message buffers
■ Sound generator : 1 channel
❐ Tone frequency : PWM frequency divide-by-two
(reload value + 1)
■ Alarm comparator : 1 channel
❐ Monitor external voltage
❐ Generate an interrupt in case of voltage lower/higher than
the defined thresholds (reference voltage)
■ 16-bit PPG timer : maximum 16 channels
■ 16-bit reload timer: 8 channels
■ 16-bit free-run timer: 8 channels (1 channel each for ICU
and OCU)
■ Input capture: maximum 8 channels (operates in conjunction
with the free-run timer)
■ Output compare: maximum 8 channels (operates in
conjunction with the free-run timer)
■ Up/Down counter: 2 channels (2*8-bit or 1*16-bit)
■ Watchdog timer
■ Real-time clock
■ Low-power consumption modes : Sleep/stop mode function
■ Low voltage detection circuit
■ Clock supervisor
❐ Monitors the sub-clock (32 kHz) and the main clock
(4 MHz) , and switches to a recovery clock (CR oscillator,
etc.) when the oscillations stop.
■ Clock modulator
■ Clock monitor
■ Sub-clock calibration
❐ Corrects the real-time clock timer when operating with the
32 kHz or CR oscillator
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-04621 Rev. *A
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 15, 2016