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Z9973 Datasheet, PDF (7/9 Pages) Cypress Semiconductor – 3.3V, 125-MHz, Multi-Output Zero Delay Buffer | |||
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Z9973
AC Parameters (VDD = 2.9V to 3.6V, VDDC = 3.3V ±10%, TA = â40°C to +85°C) (Continued)[4]
Parameter
Description
Conditions
Min. Typ. Max. Units
Fout
Maximum Output Frequency
Q (÷2)
125 MHz
Q (÷4)
120
Q (÷6)
80
FoutDC
tpZL, tpZH
tpLZ, tpHZ
TCCJ
TSKEW
Output Duty Cycle[6]
Q (÷8)
Output Enable Time[6](all outputs)
Output Disable Time[6](all outputs)
Cycle to Cycle Jitter (peak to peak)[6]
Any Output to Any Output Skew[6,7]
Propagation Delay[7,8]
60
TCYCLE
/2 â 750
TCYCLE ps
/2 + 750
2
10
ns
2
8
ns
± 100
ps
250
350
ps
â225 â25
175
ps
Tpd
QFB = (÷8)
â70 130 330
â130 70
270
Ordering Information
Part Number
IMIZ9973BA
IMIZ9973BAT
Package Type
52-pin TQFP
52-pin TQFPâTape and Reel
Production Flow
Industrial, â40°C to +85°C
Industrial, â40°C to +85°C
Notes:
7. 50⦠transmission line terminated into VDD/2.
8. Tpd is specified for a 50-MHz input reference. Tpd does not include jitter.
9. The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the âHighâ input is within the VCMR
range and the input lies within the VPP specification.
10. Inputs have pull-up/pull-down resistors that effect input current.
11. Driving series or parallel terminated 50⦠(or 50⦠to VDD/2) transmission lines.
Document #: 38-07089 Rev. *D
Page 7 of 9
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