CY7C603XX_08 Datasheet, PDF (7/31 Pages) Cypress Semiconductor – enCoRe™ III Low Voltage

CY7C603xx
Pin Information
The enCoRe III LV device is available in 28-pin SSOP and 32-pin QFN packages, which are listed and shown in the following tables.
Every port pin (labeled with a “P”) is capable of Digital IO and connection to the common analog bus. However, Vss, Vdd, SMP, and
XRES are not capable of Digital IO.
28-Pin Part Pinout
Figure 5. CY7C60323-PVXC 28-Pin Device
A, I, M, P0[7] 1
28
A, I, M, P0[5] 2
27
A, I, M, P0[3] 3
26
A, I, M, P0[1] 4
25
M, P2[7] 5
24
M, P2[5] 6
23
M, P2[3]
M, P2[1]
7 _SSOP 22
8
21
Vss 9
20
M, I2C SCL, P1[7] 10
19
M, I2C SDA, P1[5] 11
18
M, P1[3] 12
17
M, I2C SCL, P1[1] 13
16
Vss 14
15
Vdd
P0[6], A, I, M
P0[4], A, I, M
P0[2], A, I, M
P0[0], A, I, M
P2[6], M
P2[4], M
P2[2], M
P2[0], M
XRES
P1[6], M
P1[4], EXTCLK, M
P1[2], M
P1[0], I2C SDA, M
Table 3. Pin Definitions - CY7C60323-PVXC 28-Pin Device
Pin No.
Type
Digital
Analog
1
IO
I, M
2
IO
I, M
3
IO
I, M
4
IO
I, M
5
IO
M
Name
P0[7]
P0[5]
P0[3]
P0[1]
P2[7]
Description
Analog Column Mux Input.
Analog Column Mux Input and Column Output.
Analog Column Mux Input and Column Output, Integrating Input.
Analog Column Mux Input, Integrating Input.
6
IO
M
7
IO
I, M
8
IO
I, M
9
Power
10
IO
M
11
IO
M
12
IO
M
13
IO
M
14
Power
P2[5]
P2[3]
P2[1]
Vss
P1[7]
P1[5]
P1[3]
P1[1]
Vss
Direct Switched Capacitor Block Input.
Direct Switched Capacitor Block Input.
Ground Connection.
I2C Serial Clock (SCL).
I2C Serial Data (SDA).
I2C Serial Clock (SCL), ISSP-SCLK.
Ground Connection.
15
IO
M
P1[0]
I2C Serial Data (SDA), ISSP-SDATA.
16
IO
M
P1[2]
17
IO
M
P1[4]
Optional External Clock Input (EXTCLK).
18
IO
M
P1[6]
19
Input
XRES
Active HIGH External Reset with Internal Pull Down.
20
IO
I, M
P2[0]
Direct Switched Capacitor Block Input.
21
IO
I, M
P2[2]
Direct Switched Capacitor Block Input.
22
IO
M
P2[4]
23
IO
M
P2[6]
24
IO
I, M
P0[0]
Analog Column Mux Input.
Document #: 38-16018 Rev. *E
Page 7 of 31
[+] Feedback