CYBL1XX7X Datasheet, PDF (6/42 Pages) Cypress Semiconductor – Programmable Radio-on-Chip With Bluetooth Low Energy (PRoC™ BLE)

PRELIMINARY
PRoC™ BLE: CYBL1XX7X
Family Datasheet
System Resources Subsystem
Power
The power block includes internal LDOs that supply required
voltage levels for different blocks. The power system also
includes POR, BOD, and LVD circuits. The POR circuit holds the
device in the reset state until the power supplies have stabilized
at appropriate levels and the clock is ready. The BOD circuit
resets the device when the supply voltage is too low for proper
device operation. The LVD circuit generates an interrupt if the
supply voltage drops below a user-selectable level.
An external active-LOW reset pin (XRES) can be used to reset
the device. The XRES pin has an internal pull-up resistor and, in
most applications, does not require any additional pull-up
resistors. The power system is described in detail in the “Power”
section on page 14.
Clock Control
The PRoC™ BLE clock control is responsible for providing
clocks to all subsystems and also for switching between different
clock sources without glitching. The clock control for
PRoC™ BLE consists of the IMO and the internal low-speed
oscillator (ILO). It uses the 24-MHz external crystal oscillator
(ECO) and the 32-kHz WCO. In addition, an external clock may
be supplied from a pin.
The device has 12 dividers with 16 divider outputs. Two dividers
have additional fractional division capability. The HFCLK signal
is divided down, as shown in Figure 3, to generate the system
clock (SYSCLK) and peripheral clock (PERx_CLK) for different
peripherals. The system clock (SYSCLK) driving buses,
registers, and the processor must be higher than all the other
clocks in the system that are divided off HFCLK. The ECO and
WCO are present in the BLE subsystem and the clock outputs
are routed to the system resources.
Internal Main Oscillator (IMO)
The IMO is the primary system clock source, which can be
adjusted in the range of 3 MHz to 48 MHz in steps of 1 MHz. The
IMO accuracy is ±2%.
Internal Low-Speed Oscillator (ILO)
The ILO is a very-low-power 32-kHz oscillator, which is primarily
used to generate clocks for peripheral operations in Deep-Sleep
mode. The ILO-driven counters can be calibrated to the IMO to
improve accuracy. Cypress provides a software component,
which does the calibration.
Figure 3. Clock Control
BLE
Subsystem
ECO
Divider
/2ⁿ (n=0..3)
IMO
EXTCLK
WCO
ILO
Prescaler
Divider 0
(/16)
Divider 9
(/16)
Fractional
Divider 0
(/16.5)
Fractional
Divider 1
(/16.5)
HFCLK
SYSCLK
PER0_CLK
PER15_CLK
LFCLK
External Crystal Oscillator (ECO)
The ECO is used as the active clock for the BLE subsystem to
meet the ±50-ppm clock accuracy requirement of the Bluetooth
Low Energy Specification. The internal tunable load capacitor is
provided to tune the crystal clock frequency. The high-accuracy
ECO clock can also be used as a system clock.
Watch Crystal Oscillator (WCO)
The WCO is used as the sleep clock for the BLE subsystem to
meet the ±500-ppm clock accuracy requirement of the Bluetooth
Low Energy Specification. The sleep clock provides accurate
sleep timing and enables wakeup at specified advertisement and
connection intervals. With the WCO and firmware, an accurate
real-time clock (within the bounds of the 32.768-kHz crystal
accuracy) can be realized.
Voltage Reference
The internal bandgap reference circuit with 1% accuracy
provides the voltage reference for the 12-bit SAR ADC. To
enable better SNRs and absolute accuracy, it will be possible to
bypass the internal bandgap reference using a REF pin and to
use an external reference for the SAR.
Watchdog Timer (WDT)
A watchdog timer is implemented in the system resources
subsystem running from the ILO; this allows watchdog
operations during Deep-Sleep mode and generates a watchdog
reset if not serviced before the timeout occurs. The watchdog
reset is recorded in the ‘Reset Cause’ register.
Document Number: 001-95464 Rev. *H
Page 6 of 42