CY8C52_11 Datasheet, PDF (55/94 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PRELIMINARY
PSoC^® 5: CY8C52 Family Datasheet
11.3 Power Regulators
Specifications are valid for –40 °C ≤ T_A ≤ 85 °C and T_J ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted.
11.3.1 Digital Core Regulator
Table 11-4. Digital Core Regulator DC Specifications
Parameter
Description
V_DDD
V_CCD
Input voltage
Output voltage
Regulator output capacitor
Conditions
Min
Typ
Max Units
1.8
–
5.5
V
–
1.80
–
V
±10%, X5R ceramic or better. The two V_CCD
–
1
–
µF
pins must be shorted together, with as short
a trace as possible, see Power System on
page 21
Figure 11-1. Regulators V_CC vs V_DD
Figure 11-2. Digital Regulator PSRR vs Frequency and V_DD
11.3.2 Analog Core Regulator
Table 11-5. Analog Core Regulator DC Specifications
Parameter
Description
V_DDA
V_CCA
Input voltage
Output voltage
Regulator output capacitor
Conditions
±10%, X5R ceramic or better
Figure 11-3. Analog Regulator PSRR vs Frequency and V_DD
Min
Typ
Max Units
1.8
–
5.5
V
–
1.80
–
V
–
1
–
µF
Document Number: 001-66236 Rev. **
Page 55 of 94
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