CY8C24123A_12 Datasheet, PDF (53/65 Pages) Cypress Semiconductor – PSoC® Programmable System-on-Chip

CY8C24123A
CY8C24223A
CY8C24423A
Thermal Impedances
Table 48. Thermal Impedances per Package
Package
8-pin PDIP
8-pin SOIC
20-pin PDIP
20-pin SSOP
20-pin SOIC
28-pin PDIP
28-pin SSOP
28-pin SOIC
32-pin QFN^[34]
Typical _JA^[33]
123 °C/W
185 °C/W
109 °C/W
117 °C/W
81 °C/W
69 °C/W
101 °C/W
74 °C/W
22 °C/W
Capacitance on Crystal Pins
Table 49. Typical Package Capacitance on Crystal Pins
Package
8-pin PDIP
8-pin SOIC
20-pin PDIP
20-pin SSOP
20-pin SOIC
28-pin PDIP
28-pin SSOP
28-pin SOIC
32-pin QFN
Package Capacitance
2.8 pF
2.0 pF
3.0 pF
2.6 pF
2.5 pF
3.5 pF
2.8 pF
2.7 pF
2.0 pF
Solder Reflow Specifications
Table 50 shows the solder reflow temperature limits that must not be exceeded.
Table 50. Solder Reflow Specifications
Package
8-pin PDIP
8-pin SOIC
20-pin PDIP
20-pin SSOP
20-pin SOIC
28-pin PDIP
28-pin SSOP
28-pin SOIC
32-pin QFN
Maximum Peak
Temperature (T_C)
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
Maximum Time
above T_C – 5 °C
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
Notes
33. T_J = T_A + Power × _JA
34. To achieve the thermal impedance specified for the QFN package, refer to Application Notes for Surface Mount Assembly of Amkor's MicroLeadFrame (MLF) Packages
available at www.amkor.com.
Document Number: 38-12028 Rev. *R
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