CY8CMBR2110 Datasheet, PDF (51/68 Pages) Cypress Semiconductor – CapSense® Express™ 10-Button Controller

CY8CMBR2110
3.1 HOST_MODE
Host Mode register
Individual Register Names and Addresses:
HOST_MODE: Dc, 00h
7
6
Access: FD
Bit Name
5
WC^[18]: 0
Load
factory
defaults
4
R: 1
Checksum
matched
3
WC^[18]: 0
Save to
flash
2
1
0
RW: 2
Device Mode[2:0]
This register is used to save the configuration to flash, decide the device operation mode, and load factory defaults. This register also
tells whether the checksum is matched; to know more about Checksum match, refer to Steps to Configure CY8CMBR2110 on page 23.
Bit
5
Name
Load factory defaults
4
Checksum matched
3
Save to flash
2:0
Device Mode
Description
This bit is used to load factory default setting in RAM. However user configured FLASH
area does not get updated with these settings
0 No impact
1 Load factory defaults and bit is self cleared after loading factory defaults
This bit is set or cleared based on the host sent checksum and the checksum calculated
with the register data of device configuration mode and LED configuration mode
0 Host sent checksum and checksum calculated did not match
1 Host sent checksum and checksum calculated matched
This bit is used to store the current configuration into flash
0 No impact
1 stores the current configuration into flash
These bits decide the CapSense controller device mode
000 Operating mode
001 LED configuration mode
010 Device configuration mode
011 Production line test mode
100 Debug Data mode
101 Not valid
110 Not valid
111 Not valid
Note
18. Device clears the Write Clear (WC) bit automatically after the required operation.
Document Number: 001-74494 Rev. *A
Page 51 of 68