W255H Datasheet, PDF (5/10 Pages) Cypress Semiconductor – 200-MPz 24-Output Buffer for 4DDR or 3 SDRAM DIMMS

Switching Characteristics (continued)^[4]
Parameter
Name
Test Conditions
t_4d
DDR Falling Edge Rate^[3]
Measured between 20% to 80% of
output (refer to Figure 1)
t₅
Output to Output Skew for DDR^[3] All outputs equally loaded
t₆
Output to Output Skew for
SDRAM^[3]
All outputs equally loaded
t₇
SDRAM Buffer LH Prop. Delay^[3] Input edge greater than 1 V/ns
t₈
SDRAM Buffer HL Prop. Delay^[3] Input edge greater than 1 V/ns
Switching Waveforms
Duty Cycle Timing
t₁
t₂
W255
Min.
0.5
5
5
Typ.
Max.
1.50
100
150
10
10
Unit
V/ns
ps
ps
ns
ns
All Outputs Rise/Fall Time
2.4V
OUTPUT _0.4V
t₃
2.4V
0.4V
t₄
3.3V
0V
Output-Output Skew
OUTPUT
OUTPUT
t₅
SDRAM Buffer HH and LL Propagation Delay
INPUT
1.5V
OUTPUT
1.5V
t₆
t₇
Document #: 38-07255 Rev. *C
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