CYRF69303_13 Datasheet, PDF (5/70 Pages) Cypress Semiconductor – Programmable Radio-on-Chip LPstar

Pinouts
Figure 1. 40-pin QFN pinout
Corner
tabs
P0.4 1
XTAL 2
VCC 3
P0.3 4
P0.1 5
VBAT1 6
VCC 7
P2.1 8
VBAT2 9
RFBIAS 10
CYRF69303
PRoC LPstar
* E-PAD Bottom Side
30 XOUT / GPIO
29 MISO / GPIO
28 P1.5 / MOSI
27 IRQ / GPIO
26 P1.4 / SCK
25 P1.3 / SS
24 P1.2
23 VDD_Micro
22 P1.1
21 P1.0
CYRF69303
Pin Definitions
Pin
Name
Description
1
P0.4 Individually configured GPIO
2
XTAL 12 MHz crystal
3, 7, 16, 40
4
V_CC
P0.3
Connected to 2.7 V to 3.6 V supply, through 0.047 F bypass C.
Individually configured GPIO
5
P0.1 Individually configured GPIO
6
V_bat1
Connect to 2.7 V to 3.6 V power supply, through 47 ohm series/1 F shunt C
8
P2.1 GPIO. Port 2 Bit 1
9
V_bat2
Connected to 2.7 V to 3.6 V main power supply, through 0.047 F bypass C
10
RF_bias RF pin voltage reference
11
RF_p
Differential RF to or from antenna
12
GND GND
13
RF_n
Differential RF to or from antenna
14, 17, 18, 20
NC
15
P2.0 GPIO
19
RESV Reserved. Must connect to GND
21
P1.0 / GPIO 1.0 / ISSP-SCLK
ISSP-SCLK
22
P1.1 / GPIO 1.1 / ISSP-SDATA
ISSP-SDATA
23
V_{DD_micro} MCU supply connected to V_CC, max CPU 12 MHz
24
P1.2 GPIO
25
P1.3 / nSS Slave Select
26
P1.4 / SCK SPI Clock
Document Number: 001-66502 Rev. *D
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