CYRF69303_13 Datasheet, PDF (38/70 Pages) Cypress Semiconductor – Programmable Radio-on-Chip LPstar

CYRF69303
Table 51. P1.0 Configuration (P10CR) [0x0D] [R/W]
Bit #
7
6
5
4
3
2
1
Field
Reserved
Int Enable Int Act Low Reserved
Reserved
Reserved
5K pullup
Enable
Read/Write
R/W
R/W
R/W
–
–
–
R/W
Default
0
0
0
0
0
0
0
This register controls the operation of the P1.0 pin.
Note The P1.0 is an open drain only output. It can actively drive a signal low, but cannot actively drive a signal high.
Bit 0 This bit enables the output on P1.0. This bit must be cleared in sleep mode.
Bit 7
Reserved
Bit 6
see Section Int Enable
Bit 5
see Section Int Act Low
Bit 4
Reserved
Bit 3
Reserved
Bit 2
Reserved
Bit 1
0 = disables the 5K ohm pull-up resistors
1 = enables 5K ohm pull-up resistors for both
P1.0 and P1.1 (this is not compatible with USB)
0
Output
enable
R/W
0
Table 52. P1.1 Configuration (P11CR) [0x0E] [R/W]
Bit #
7
6
5
4
3
2
Field
Reserved Int Enable Int Act Low
Reserved
Open Drain
Read/Write
–
R/W
R/W
–
–
R/W
Default
0
0
0
0
0
0
This register controls the operation of the P1.1 pin.
The pull-up resistor on this pin is enabled by the P10CR Register.
Note There is no 2 mA sourcing capability on this pin. The pin can only sink 5 mA at V_OL3 section.
Bit 7
Reserved
Bit 6
see Section Int Enable
Bit 5
see Section Int Act Low
Bit 4
Reserved
Bit 3
Reserved
Bit 2
see Section Open Drain
Bit 1
Reserved
Bit 0
see Section Output Enable
1
Reserved
–
0
0
Output
Enable
R/W
0
Document Number: 001-66502 Rev. *D
Page 38 of 70