CYRF69303_13 Datasheet, PDF (15/70 Pages) Cypress Semiconductor – Programmable Radio-on-Chip LPstar

CYRF69303
Source Indirect Post Increment
The result of an instruction using this addressing mode is placed
in the Accumulator. Operand 1 is an address pointing to a
location within the memory space, which contains an address
(the indirect address) for the source of the instruction. The
indirect address is incremented as part of the instruction
execution. This addressing mode is only valid on the MVI
instruction. The instruction using this addressing mode is two
bytes in length. Refer to the PSoC Designer: Assembly
Language User Guide for further details on MVI instruction.
Table 18. Source Indirect Post Increment
Opcode
Operand 1
Instruction
Source Address Address
Example
MVI A,
[8] In this case, the value in the memory
location at address 8 is an indirect
address. The memory location pointed to
by the indirect address is moved into the
Accumulator. The indirect address is then
incremented.
Destination Indirect Post Increment
The result of an instruction using this addressing mode is placed
within the memory space. Operand 1 is an address pointing to a
location within the memory space, which contains an address
(the indirect address) for the destination of the instruction. The
indirect address is incremented as part of the instruction
execution. The source for the instruction is the Accumulator. This
addressing mode is only valid on the MVI instruction. The
instruction using this addressing mode is two bytes in length.
Table 19. Destination Indirect Post Increment
Opcode
Instruction
Operand 1
Destination Address Address
Example
MVI [8],
A In this case, the value in the memory
location at address 8 is an indirect
address. The Accumulator is moved
into the memory location pointed to
by the indirect address. The indirect
address is then incremented.
Document Number: 001-66502 Rev. *D
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