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CY7C1525KV18_12 Datasheet, PDF (5/34 Pages) Cypress Semiconductor – 72-Mbit QDR® II SRAM Two-Word Burst Architecture
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CY7C1525KV18
CY7C1512KV18
CY7C1514KV18
Pin Configurations
The pin configurations for CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 follow. [1]
Figure 1. 165-ball FBGA (13 × 15 × 1.4 mm) pinout
CY7C1525KV18 (8 M × 9)
1
2
3
4
5
6
7
8
9
10
11
A
CQ
A
A
WPS
NC
K NC/144M RPS
A
A
CQ
B
NC
NC
NC
A NC/288M K
BWS0
A
NC
NC
Q4
C
NC
NC
NC
VSS
A
A
A
VSS
NC
NC
D4
D
NC
D5
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
Q5
VDDQ
VSS
VSS
VSS
VDDQ
NC
D3
Q3
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
D6
Q6
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
Q2
D2
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
Q7
D7
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
Q1
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
D1
N
NC
D8
NC
VSS
A
A
A
VSS
NC
NC
NC
P
NC
NC
Q8
A
A
C
A
A
NC
D0
Q0
R
TDO
TCK
A
A
A
C
A
A
A
TMS
TDI
Note
1. NC/144M and NC/288M are not connected to the die and can be tied to any voltage level.
Document Number: 001-00436 Rev. *P
Page 5 of 34
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