CY8C54_11 Datasheet, PDF (49/105 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

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PRELIMINARY
PSoC^® 5: CY8C54 Family Datasheet
Figure 8-4. Analog Comparator
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_^comp0
ANAIF
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comp1
_
From
Analog
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From
Analog
Routing
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c_{_}omp2
44 44
LUT0
LUT1
44 44
LUT2
LUT3
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comp3_{_}
From
Analog
Routing
UDBs
8.3.2 LUT
The CY8C54 family of devices contains four LUTs. The LUT is a
two input, one output lookup table that is driven by any one or
two of the comparators in the chip. The output of any LUT is
routed to the digital system interface of the UDB array. From the
digital system interface of the UDB array, these signals can be
connected to UDBs, DMA controller, I/O, or the interrupt
controller.
The LUT control word written to a register sets the logic function
on the output. The available LUT functions and the associated
control word is shown in Table 8-1.
Table 8-1. LUT Function vs. Program Word and Inputs
Control Word
Output (A and B are LUT inputs)
0000b
FALSE (‘0’)
0001b
A AND B
0010b
A AND (NOT B)
0011b
A
0100b
(NOT A) AND B
0101b
B
0110b
A XOR B
0111b
A OR B
1000b
A NOR B
1001b
A XNOR B
1010b
NOT B
1011b
A OR (NOT B)
1100b
NOT A
1101b
(NOT A) OR B
1110b
A NAND B
1111b
TRUE (‘1’)
Document Number: 001-66238 Rev. **
Page 49 of 105
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