BCM88335 Datasheet, PDF (49/140 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 for Automotive Applications

BCM88335 Data Sheet
UART Interface
Long Frame Sync, Slave Mode
Figure 13: PCM Timing Diagram (Long Frame Sync, Slave Mode)
PCM_BCLK
PCM_SYNC
PCM_OUT
PCM_IN
1
4
5
Bit 0
6
Bit 0
Bit 1
Bit 1
2
3
9
HIGH IMPEDANCE
7
8
Table 8: PCM Interface Timing Specifications (Long Frame Sync, Slave Mode)
Ref No.
1
2
3
4
5
6
7
8
9
Characteristics
PCM bit clock frequency
PCM bit clock LOW
PCM bit clock HIGH
PCM_SYNC setup
PCM_SYNC hold
PCM_OUT delay
PCM_IN setup
PCM_IN hold
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
Minimum
–
41
41
8
8
0
8
8
0
Typical
–
–
–
–
–
–
–
–
–
Maximum Unit
12
MHz
–
ns
–
ns
–
ns
–
ns
25
ns
–
ns
–
ns
25
ns
UART Interface
The UART is a standard 4-wire interface (RX, TX, RTS, and CTS) with adjustable baud rates from 9600 bps to
4.0 Mbps. The interface features an automatic baud rate detection capability that returns a baud rate selection.
Alternatively, the baud rate may be selected through a vendor-specific UART HCI command.
UART has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support EDR. Access to the FIFOs is
conducted through the AHB interface through either DMA or the CPU. The UART supports the Bluetooth 4.1
UART HCI specification: H4, a custom Extended H4, and H5. The default baud rate is 115.2 Kbaud.
The UART supports the 3-wire H5 UART transport, as described in the Bluetooth specification (“Three-wire
UART Transport Layer”). Compared to H4, the H5 UART transport reduces the number of signal lines required
by eliminating the CTS and RTS signals.
Broadcom^®
September 23, 2015 • 88335-DS100-R
BROADCOM CONFIDENTIAL
Page 48