CYRF69103_08 Datasheet, PDF (47/65 Pages) Cypress Semiconductor – Programmable Radio on Chip Low Power

CYRF69103
Table 66. Programmable Interval Reload High (PIRH) [0x29] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Prog Interval[11:8]
Read/Write
--
--
--
--
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bits [7:4] Reserved
Bits 3:0 Prog Interval [11:8]
This register holds the higher 4 bits of the timer. While writing into the 12-bit reload register, write lower byte first then the higher
nibble
Figure 16. 16-Bit Free-Running Counter Loading Timing Diagram
clk_sys
write
valid
addr
write data
FRT reload
ready
Clk Timer
12b Prog Timer
12b reload
interrupt
Capture timer
clk
12-bit programmable timer load timing
16b free running
counter load
16b free
running counter
00A0 00A1 00A2 00A3 00A4 00A5 00A6 00A7 00A8 00A9 00AB 00AC 00AD 00AE 00AF 00B0 00B1 00B2 ACBE ACBF ACC0
16-bit free running counter loading timing
Document #: 001-07611 Rev *C
Page 47 of 65
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