CY8C36_13 Datasheet, PDF (40/129 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PSoC^® 3: CY8C36 Family Datasheet
6.4.19 JTAG Boundary Scan
The device supports standard JTAG boundary scan chains on all
I/O pins for board level test.
7. Digital Subsystem
The digital programmable system creates application specific
combinations of both standard and advanced digital peripherals
and custom logic functions. These peripherals and logic are then
interconnected to each other and to any pin on the device,
providing a high level of design flexibility and IP security.
The features of the digital programmable system are outlined
here to provide an overview of capabilities and architecture. You
do not need to interact directly with the programmable digital
system at the hardware and register level. PSoC Creator
provides a high level schematic capture graphical interface to
automatically place and route resources similar to PLDs.
The main components of the digital programmable system are:
„ Universal Digital Blocks (UDB) – These form the core
functionality of the digital programmable system. UDBs are a
collection of uncommitted logic (PLD) and structural logic
(Datapath) optimized to create all common embedded
peripherals and customized functionality that are application or
design specific.
„ Universal Digital Block Array – UDB blocks are arrayed within
a matrix of programmable interconnect. The UDB array
structure is homogeneous and allows for flexible mapping of
digital functions onto the array. The array supports extensive
and flexible routing interconnects between UDBs and the
Digital System Interconnect.
„ Digital System Interconnect (DSI) – Digital signals from
Universal Digital Blocks (UDBs), fixed function peripherals, I/O
pins, interrupts, DMA, and other system core signals are
attached to the Digital System Interconnect to implement full
featured device connectivity. The DSI allows any digital function
to any pin or other feature routability when used with the
Universal Digital Block Array.
Figure 7-1. CY8C36 Digital Programmable Architecture
Digital Core System
and Fixed Function Peripherals
DSI Routing Interface
UDB UDB UDB UDB
UDB UDB UDB UDB
UDB UDB UDB UDB
UDB UDB UDB UDB
UDB UDB UDB UDB
UDB UDB UDB UDB
DSI Routing Interface
Digital Core System
and Fixed Function Peripherals
7.1 Example Peripherals
The flexibility of the CY8C36 family’s Universal Digital Blocks
(UDBs) and Analog Blocks allow the user to create a wide range
of components (peripherals). The most common peripherals
were built and characterized by Cypress and are shown in the
PSoC Creator component catalog, however, users may also
create their own custom components using PSoC Creator. Using
PSoC Creator, users may also create their own components for
reuse within their organization, for example sensor interfaces,
proprietary algorithms, and display interfaces.
The number of components available through PSoC Creator is
too numerous to list in the data sheet, and the list is always
growing. An example of a component available for use in
CY8C36 family, but, not explicitly called out in this data sheet is
the UART component.
7.1.1 Example Digital Components
The following is a sample of the digital components available in
PSoC Creator for the CY8C36 family. The exact amount of
hardware resources (UDBs, routing, RAM, flash) used by a
component varies with the features selected in PSoC Creator for
the component.
„ Communications
‡ I²C
‡ UART
‡ SPI
„ Functions
‡ EMIF
‡ PWMs
‡ Timers
‡ Counters
„ Logic
‡ NOT
‡ OR
‡ XOR
‡ AND
7.1.2 Example Analog Components
The following is a sample of the analog components available in
PSoC Creator for the CY8C36 family. The exact amount of
hardware resources (SC/CT blocks, routing, RAM, flash) used
by a component varies with the features selected in PSoC
Creator for the component.
„ Amplifiers
‡ TIA
‡ PGA
‡ opamp
„ ADC
‡ Delta-Sigma
„ DACs
‡ Current
‡ Voltage
‡ PWM
„ Comparators
„ Mixers
Document Number: 001-53413 Rev. *Q
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