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CY7C1410V18 Datasheet, PDF (4/23 Pages) Cypress Semiconductor – 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture
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PRELIMINARY
Pin Configurations
CY7C1410V18 (4M × 8) – 15 × 17 FBGA
1
2
3
4
5
6
7
8
A
CQ NC/72M
A
WPS
NWS1
K NC/144M RPS
B
NC
NC
NC
A
NC/288M K
NWS0
A
C
NC
NC
NC
VSS
A
A
A
VSS
D
NC
D4
NC
VSS
VSS
VSS
VSS
VSS
E
NC
NC
Q4
VDDQ
VSS
VSS
VSS
VDDQ
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
G
NC
D5
Q5
VDDQ
VDD
VSS
VDD
VDDQ
H
DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
L
NC
Q6
D6
VDDQ
VSS
VSS
VSS
VDDQ
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
N
NC
D7
NC
VSS
A
A
A
VSS
P
NC
NC
Q7
A
A
C
A
A
R
TDO
TCK
A
A
A
C
A
A
CY7C1410V18
CY7C1425V18
CY7C1412V18
CY7C1414V18
9
10
11
A
A
CQ
NC
NC
Q3
NC
NC
D3
NC
NC
NC
NC
D2
Q2
NC
NC
NC
NC
NC
NC
VDDQ
VREF
ZQ
NC
Q1
D1
NC
NC
NC
NC
NC
Q0
NC
NC
D0
NC
NC
NC
NC
NC
NC
A
TMS
TDI
CY7C1425V18 (4M × 9)–11 × 15 Balls (15 × 17 FBGA)
1
2
3
4
5
6
7
8
9
10
11
A
CQ NC/72M A
WPS
NC
K NC/144M RPS
A
A
CQ
B
NC
NC
NC
A NC/288M K
BWS0
A
NC
NC
Q4
C
NC
NC
NC
VSS
A
A
A
VSS
NC
NC
D4
D
NC
D5
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
Q5
VDDQ
VSS
VSS
VSS
VDDQ
NC
D3
Q3
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
D6
Q6
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
Q2
D2
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
Q7
D7
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
Q1
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
D1
N
NC
D8
NC
VSS
A
A
A
VSS
NC
NC
NC
P
NC
NC
Q8
A
A
C
A
A
NC
D0
Q0
R
TDO TCK
A
A
A
C
A
A
A
TMS
TDI
Document #: 38-05592 Rev. **
Page 4 of 23
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