CY8C20134_1106 Datasheet, PDF (35/47 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip Low power at high speed

CY8C20134, CY8C20234, CY8C20334
CY8C20434, CY8C20534, CY8C20634
Thermal Impedances
Table 33 illustrates the minimum solder reflow peak temperature to achieve good solderability.
Table 33. Thermal Impedances Per Package
Package
8 SOIC
Typical θ_JA ^[24]
127 °C/W
16 SOIC
80 °C/W
16 QFN
24 QFN^[25]
46 °C/W
25 °C/W
28 SSOP
96 °C/W
30 WLCSP
32 QFN^[25]
48 QFN^[25]
54 °C/W
27 °C/W
28 °C/W
Solder Reflow Specifications
Table 34 shows the solder reflow temperature limits that must not be exceeded.
Table 34. Solder Reflow Specifications
Package
8-Pin SOIC
16-Pin SOIC
16-Pin QFN
24-Pin QFN
28-Pin SSOP
30-Pin WLCSP
32-Pin QFN
48-Pin QFN
Maximum Peak
Temperature (T_C)
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
260 °C
Maximum Time above
T_C – 5 °C
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
Notes
24. T_J = T_A + Power × θ_JA.
25. To achieve the thermal impedance specified for the QFN package, refer to "Application Notes for Surface Mount Assembly of Amkor's MicroLeadFrame (Packages
available at http://www.cypress.com.
26. Higher temperatures is required based on the solder melting point. Typical temperatures for solder are 220 ±5 °C with Sn-Pb or 245 ± 5 °C with Sn-Ag-Cu paste.
Refer to the solder manufacturer specifications.
Document Number: 001-05356 Rev. *O
Page 35 of 47
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