CY8C21234_08 Datasheet, PDF (34/43 Pages) Cypress Semiconductor – PSoC® Mixed-Signal Array

CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Packaging Information
This section shows the packaging specifications for the CY8C21x34 PSoC device with the thermal impedances for each package.
Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of
the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at
http://www.cypress.com/design/MR10161.
Packaging Dimensions
8
9
Figure 20. 16-Pin (150-Mil) SOIC
PIN 1 ID
1
0.150[3.810]
0.157[3.987]
0.230[5.842]
0.244[6.197]
16
DIMENSIONS IN INCHES[MM] MIN.
REFERENCE JEDEC MS-012
PACKAGE WEIGHT 0.15gms
MAX.
PART #
S16.15 STANDARD PKG.
SZ16.15 LEAD FREE PKG.
0.050[1.270]
BSC
0.386[9.804]
0.393[9.982]
0.0138[0.350]
0.0192[0.487]
SEATING PLANE
0.061[1.549]
0.068[1.727]
0.004[0.102]
0.004[0.102]
0.0098[0.249]
0°~8°
0.010[0.254] _{X 45°}
0.016[0.406]
0.016[0.406]
0.035[0.889]
0.0075[0.190]
0.0098[0.249]
51-85068 *B
Figure 21. 20-Pin (210-MIL) SSOP
Document Number: 38-12025 Rev. *M
51-85077 *C
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