CY8C21234_08 Datasheet, PDF (12/43 Pages) Cypress Semiconductor – PSoC® Mixed-Signal Array

CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Table 6. Pin Definitions - CY8C21434/CY8C21634 32-Pin (QFN**)
Pin
No.
1
2
3
4
5
6
6
Type
Digital Analog
IO
I, M
IO
M
IO
M
IO
M
IO
M
IO
M
Power
Name
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
SMP
7
IO
M
7
Power
8
IO
M
9
IO
M
10
IO
M
11
IO
M
12
Power
13
IO
M
14
IO
M
15
IO
M
16
IO
M
17
Input
18
IO
M
19
IO
M
20
IO
M
21
IO
M
22
IO
M
23
IO
M
24
IO
I, M
25
IO
I, M
26
IO
I, M
27
IO
I, M
28
Power
29
IO
I, M
30
IO
I, M
31
IO
I, M
32
Power
P3[1]
Vss
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P3[0]
P3[2]
P2[0]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
P0[7]
P0[5]
P0[3]
Vss
Description
Analog column mux input, integrating input.
In CY8C21434 part.
Switch Mode Pump (SMP) connection to required external components in
CY8C21634 part.
In CY8C21434 part.
Ground connection in CY8C21634 part.
I2C Serial Clock (SCL).
I2C Serial Data (SDA).
I2C Serial Clock (SCL), ISSP-SCLK*.
Ground connection.
I2C Serial Data (SDA), ISSP-SDATA*.
Optional External Clock Input (EXTCLK).
Active high external reset with internal pull down.
Analog column mux input.
Analog column mux input.
Analog column mux input.
Analog column mux input.
Supply voltage.
Analog column mux input.
Analog column mux input.
Analog column mux input, integrating input.
Ground connection.
LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Mixed-Signal Array Technical Reference Manual for details.
** The center pad on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it must
be electrically floated and not connected to any other signal.
Document Number: 38-12025 Rev. *M
Page 12 of 43
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