CY14C512PA_13 Datasheet, PDF (34/42 Pages) Cypress Semiconductor – 512-Kbit (64 K x 8) SPI nvSRAM

CY14C512PA
CY14B512PA
CY14E512PA
Switching Waveforms
Figure 34. Synchronous Data Timing (Mode 0)
CS
SCK
SI
tCSS
tCH
tSD tHD
VALID IN
HI-Z
SO
tCL
VALID IN
VALID IN
tCO
Figure 35. HOLD Timing
CS
SCK
HOLD
SO
tHH
tSH
tHHZ
tHH
tSH
tHLZ
tCS
tCSH
tOH
tHZCS
HI-Z
Document Number: 001-65268 Rev. *F
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