S29GL01GT Datasheet, PDF (31/105 Pages) Cypress Semiconductor – 1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte)

S29GL01GT, S29GL512T
Figure 5.4 Sector Erase Operation
Write Unlock Cycles (x16):
Address 555h, Data AAh
Address 2AAh, Data 55h
Unlock Cycle 1
Unlock Cycle 2
Write Sector Erase Cycles (x16):
Address 555h, Data 80h
Address 555h, Data AAh
Address 2AAh, Data 55h
Sector Address, Data 30h
Command Cycle 1
Command Cycle 2
Command Cycle 3
Specify first sector for erasure
No
Select
Additional
Sectors?
Yes
Write Additional
Sector Addresses
No
Poll DQ3.
DQ3 = 1?
Yes
Yes
Last Sector
Selected?
No
Perform Write Operation
Status Algorithm
• Each additional cycle must be written within t_SEA timeout
• The host system may monitor Status Register DQ7 or Data Polling
DQ3 or wait t_SEA to ensure acceptance of erase commands
• No limit on number of sectors
• Commands other than Erase Suspend or selecting additional
sectors for erasure during timeout reset device to reading array
data
Status may be obtained by reading Status Register,
Data Polling, or RD/BY# methods
Yes
Done?
No
Erase Error?
No
Yes
Error condition (Exceeded Timing Limits)
PASS. Device returns
to reading array.
Note:
1. See command summary for x8 bus cycles.
FAIL. Write reset command
to return to reading array.
Document Number: 002-00247 Rev. *G
Page 31 of 105