CY14B101Q1_11 Datasheet, PDF (3/26 Pages) Cypress Semiconductor – 1 Mbit (128 K x 8) Serial SPI nvSRAM Infinite read, write, and RECALL cycles

CY14B101Q1
CY14B101Q2
CY14B101Q3
Pinouts
Figure 1. Pin Diagram - 8-Pin DFN^{[1, 2, 3]}
CY14B101Q1
CY14B101Q2
CS
O
1
8
VCC
CS
O
1
8
VCC
SO
2
7
HOLD
EXPOSED
WP
3
PAD
6 ^SCK
SO
VCAP
2
7
EXPOSED
3
PAD
6
HOLD
SCK
VSS
4
5 ^SI
VSS
4
5 SI
Top View
(not to scale)
Top View
(not to scale)
Figure 2. Pin Diagram - 16-Pin SOIC
NC 1
16 V_CC
NC 2
15 NC
NC
NC
WP
HOLD
3
14
CY14B101Q3
4
13
Top View
5 _{not to scale} 12
6
11
V_CAP
SO
SI
SCK
NC ⁷
V_{SS 8}
10 CS
9 HSB
Table 1. Pin Definitions
Pin Name
CS
SCK
SI
SO
WP
HOLD
HSB
V_CAP
NC
V_SS
V_CC
EXPOSED
PAD
I/O Type
Input
Input
Input
Output
Input
Input
Input/Output
Power supply
No connect
Power supply
Power supply
No connect
Description
Chip select. Activates the device when pulled LOW. Driving this pin high puts the device in low
power standby mode.
Serial clock. Runs at speeds up to maximum of f_SCK. Serial input is latched at the rising edge of
this clock. Serial output is driven at the falling edge of the clock.
Serial input. Pin for input of all SPI instructions and data.
Serial output. Pin for output of data through SPI.
Write protect. Implements hardware write protection in SPI.
HOLD pin. suspends serial operation.
Output: Indicates busy status of nvSRAM when LOW. After each Hardware and Software STORE
operation HSB is driven HIGH for a short time (t_HHHD) with standard output high current and then
weak internal pull up resistor keeps this pin HIGH (External pull up resistor connection optional).
Input: Hardware STORE implemented by pulling this pin LOW externally.
AutoStore capacitor. Supplies power to the nvSRAM during power loss to STORE data from the
SRAM to nonvolatile elements. If AutoStore is not needed, this pin must be left as No connect. It
must never be connected to V_SS.
No connect: This pin is not connected to the die.
Ground
Power supply (2.7 V to 3.6 V)
The EXPOSED PAD on the bottom of 8-pin DFN package is not connected to the die. It is
recommended to connect the EXPOSED PAD to V_SS. Thermal vias can be used to increase thermal
conductivity.
Notes
1. HSB pin is not available in 8 DFN packages.
2. CY14B101Q1 part does not have V_CAP pin and does not support AutoStore.
3. CY14B101Q2 part does not have WP pin
Document #: 001-50091 Rev. *H
Page 3 of 26
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