CY8CLED16_10 Datasheet, PDF (27/43 Pages) Cypress Semiconductor – EZ-Color™ HB-LED Controller

CY8CLED16
AC Electrical Characteristics
AC Chip Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T_A ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T_A ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Note See the individual user module data sheets for information on maximum frequencies for user modules.
Table 21. AC Chip Level Specifications
Symbol
F_IMO24
Description
Min
Internal Main Oscillator Frequency for 24 23.4
MHz
F_IMO6
Internal Main Oscillator Frequency for 6 5.5
MHz
F_CPU1
F_CPU2
F_48M
F_24M
F_32K1
F_{32K_U}
CPU Frequency (5V Nominal)
CPU Frequency (3.3V Nominal)
Digital PSoC Block Frequency
0.093
0.093
0
Digital PSoC Block Frequency
0
Internal Low Speed Oscillator Frequency 15
Internal Low Speed Oscillator Untrimmed 5
Frequency
DC_ILO
F_32K2
Internal Low Speed Oscillator Duty Cycle 20
External Crystal Oscillator
–
F_PLL
PLL Frequency
–
Jitter24M2
T_PLLSLEW
T_PLLSLEWL
OW
T_OS
T_OSACC
24 MHz Period Jitter (PLL)
–
PLL Lock Time
0.5
PLL Lock Time for Low Gain Setting 0.5
External Crystal Oscillator Startup to 1% –
External Crystal Oscillator Startup to 100 –
ppm
Jitter32k 32 kHz Period Jitter
–
T_XRST
External Reset Pulse Width
10
DC24M
24 MHz Duty Cycle
40
Typ
24
6
24
12
48
24
32
–
50
32.768
23.986
–
–
–
Max
24.6^[9,10,11]
6.5^[9,10,11]
24.6^[9,10]
12.3^[10,11]
49.2^[9,10,12]
24.6^[10,12]
64
–
80
–
–
600
10
50
Units
MHz
MHz
MHz
MHz
MHz
MHz
kHz
kHz
%
kHz
MHz
ps
ms
ms
Notes
Trimmed for 5V or 3.3V operation
using factory trim values. See the
figure on page 19. SLIMO Mode =
0.
Trimmed for 5V or 3.3V operation
using factory trim values. See the
figure on page 19. SLIMO Mode =
1.
Refer to the AC Digital Block Speci-
fications below.
After a reset and before the m8c
starts to run, the ILO is not
trimmed. See the System Resets
section of the PSoC Technical
Reference Manual for details on
timing this.
Accuracy is capacitor and crystal
dependent. 50% duty cycle.
A multiple (x732) of crystal
frequency.
250 500
300 600
100
–
–
50
60
ms
ms
The crystal oscillator frequency is
within 100 ppm of its final value by
the end of the T_osacc period.
Correct operation assumes a
properly loaded 1 μW maximum
drive level 32.768 kHz crystal. 3.0V
≤ Vdd ≤ 5.5V, -40 ^oC ≤ T_A ≤ 85 ^oC.
ns
μs
%
Notes
9. 4.75V < Vdd < 5.25V.
10. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
11. 3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation
at 3.3V.
12. See the individual user module data sheets for information on maximum frequencies for user modules
Document Number: 001-13105 Rev. *C
Page 27 of 43
[+] Feedback