CY8C41123 Datasheet, PDF (25/36 Pages) Cypress Semiconductor – Linear Power PSoC™ Devices

PRELIMINARY
CY8C41123 and CY8C41223
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 36V
and -40°C ≤ T_A ≤ 85°C (referred to as 5V operation), 3.0V to 3.6V and -40°C ≤ T_A ≤ 85°C (referred to as 3.3V operation), or 2.5V
to 3.0V and -40°C ≤ T_A ≤ 85°C (referred to as 2.7V operation), respectively. Typical parameters apply to 5V, 3.3V, and 2.7V at
25°C and are for design guidance only.
8.21 AC Analog-to-Digital Converter Specifications
Parameter
Description
Sample Rate^{a, b}
8-Bit Sample Rate^b
Conditions
12 bits to 6 bits at 6 MHz.
Min. Typ.
Max.
1.46
–
93.75
–
23.4
–
a. Dependent on clock frequency and bit resolution. See individual user module data sheets.
b. For HV_dd = 2.5V to 3.0V, sample rates are halved. Bit BPEN in the AC0_CLK register must be set to 1.
Units
Ksps
Ksps
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 36V
and -40°C ≤ T_A ≤ 85°C (referred to as 5V operation), 3.0V to 3.6V and -40°C ≤ T_A ≤ 85°C (referred to as 3.3V operation), or 2.5V
to 3.0V and -40°C ≤ T_A ≤ 85°C (referred to as 2.7V operation), respectively. Typical parameters apply to 5V, 3.3V, and 2.7V at
25°C and are for design guidance only.
8.22 3.0V to 36V AC Digital Block Specifications
Parameter
Timer
Counter
Description
Capture Pulse Width
Maximum Frequency (Capture
Not Used)
Maximum Frequency (With or
Without Capture)
Enable Pulse Width
Maximum Frequency (Enable
Not Used)
Maximum Frequency (With or
Without Enable Input)
Conditions
4.75V < HV_dd < 36V.
3.0V < HV_dd < 36V.
4.75V < HV_dd < 36V.
3.0V < HV_dd < 36V.
Min.
50^a
–
–
50^a
–
–
Typ.
–
–
–
–
–
–
Max.
–
49.9
25.0
–
49.9
25.0
Units
ns
MHz
MHz
ns
MHz
MHz
a. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
8.23 2.5V to 3.0V AC Digital Block Specifications
Parameter
Timer
Counter
Description
Capture Pulse Width
Maximum Frequency
Enable Pulse Width
Maximum Frequency
Conditions
Min.
100^a
–
100^a
–
Typ.
–
–
–
–
Max.
–
12.5
–
12.5
Units
ns
MHz
ns
MHz
a. 50 ns minimum input pulse width is based on the input synchronizers running at 12 MHz (84 ns nominal period).
Document 001-00360 Rev. *A
Page 25 of 36