CY8C41123 Datasheet, PDF (1/36 Pages) Cypress Semiconductor – Linear Power PSoC™ Devices

PRELIMINARY
CY8C41123 and CY8C41223
Linear Power PSoC™ Devices
1.0 Features
1.1 Key Features
• Extended Operating Voltage of 2.5V to 36V
• 2 HV Linear Opamp Control Loops for Driving Power PFETs
• 2 HV Analog Sense Inputs
• 4KB of Flash
• 256 Bytes of SRAM
1.2 Improved Features
• Very Low Current Mode for 100 nA Sleep (Deep Sleep)
• Analog Absolute Accuracy (0.75%)
• Additional Flexibility for Sleep Modes
2.0 Block Diagram
• 2 Comparators with DAC References
• 6- to 12-Bit ADC (20 Ksps at 8 Bits)
• Configurable Analog Mux, 10:1 or 5:2 Differential
• Configurable Digital Blocks
— 8- to 16-Bit Timers and Counters
— Connectable to All GPIO Pins
— Digital Blocks can Drive Outputs to 36V
— Complex Peripherals by Combining Blocks
1.3 Applications
• Battery Chargers (Linear or Fly Back)
• White LED Drivers
• Temperature Sensor (Thermistor, Thermocouple)
HVdd
GDO1
VS1
P0[7]
P0[5]
P0[3]
P0[1]
P1[1]
PSoC CORE
SleepandWatchdog
POR andLVD
PSMo8CCCCPOURE
4KBFlash
256BSRAM
SystemResets
InterruptController
LowDrop-Out
R eg ulator
InternalVdd
ANALOG and HIGH VOLTAGE
SECTIONS
ODAC1
ODAC0
VDAC1
VBG
VDAC1 _IBIAS VDAC0
VDAC0
Analog to
Dig ital
Convertor
Atten1
AMuxBus3
AMuxBus1
COMP1
ODAC1
Atten0
AMuxBus2
AMuxBus0
ODAC0
COMP0
Gl oba l Di g i tal Interconn ectBus
System Bus
DBC00
DBC01
DBD02
DigitalPSoC BlockArray
DIGITAL SYSTEM
DBD03
1 D ig italR ow
Figure 2-1. Block Diagram
GDO0
VS0
P0[6]
P0[4]
P0[2]
P0[0]
P1[0]
SYSTEM RESOURCES
LowSpeed
Oscillator
Internal
Voltag e
Reference
Internal
Main
Oscillator
I2C
D ig ital
Clocks
Cypress Semiconductor Corporation
Document 001-00360 Rev. *A
• 198 Champion Court
• San Jose, CA 95134 • 408.943.2600
Revised November 17, 2005