S25FL064P Datasheet, PDF (21/62 Pages) SPANSION – 64-Mbit CMOS 3.0 Volt Flash Memory with 104-MHz SPI (Serial Peripheral Interface) Multi I/O Bus

S25FL064P
9.3 Dual Output Read Mode (DOR)
The Dual Output Read instruction is similar to the FAST_READ instruction, except that the data is shifted out 2 bits at a time using 2
pins (SI/IO0 and SO/IO1) instead of 1 bit, at a maximum frequency of 80 MHz. The Dual Output Read mode effectively doubles the
data transfer rate compared to the FAST_READ instruction.
The host system must first select the device by driving CS# low. The Dual Output Read command is then written to SI, followed by a
3-byte address (A23-A0) and a dummy byte. Each bit is latched on the rising edge of SCK. Then the memory contents, at the
address that is given, are shifted out two bits at a time through the IO0 (SI) & IO1 (SO) pins at a frequency f_C on the falling edge of
SCK.
The Dual Output Read command sequence is shown in Figure 9.3 and Table 9.1 on page 18. The first address byte specified can
start at any location of the memory array. The device automatically increments to the next higher address after each byte of data is
output. The entire memory array can therefore be read with a single Dual Output Read command. When the highest address is
reached, the address counter reverts to 00000h, allowing the read sequence to continue indefinitely.
It is important that the I/O pins be set to high-impedance prior to the falling edge of the first data out clock.
The Dual Output Read command is terminated by driving CS# high at any time during data output. The device rejects any Dual
Output Read command issued while it is executing a program, erase, or Write Registers operation, and continues the operation
uninterrupted.
CS#
SCK
SI/IO0
SO/IO1
Figure 9.3 Dual Output Read Instruction Sequence
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Instruction
24 Bit
Address
Dummy Byte
SI Switches from Input to Output
23 22 21
*
3210765432106 4 2 06 4 2 06
*
Hi-Z
7 ^53175317
* _{Byte 1}
* _{Byte 2}
*MSB
Document Number: 002-00649 Rev. *I
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