CYP15G0401TB Datasheet, PDF (21/30 Pages) Cypress Semiconductor – Quad HOTLink II™ Transmitter

PRELIMINARY
CYP15G0401TB
Table 10.Package Coordinate Signal Allocation (continued)
Ball
ID Signal Name
L02
N/C
L03
TXCLKC
L04
TXDC[6]
L17
N/C
L18
N/C
L19
N/C
L20
TXDB[6]
M01
N/C
M02
N/C
M03
N/C
M04
N/C
M17 TXCTB[1]
M18 TXCTB[0]
M19
TXDB[7]
M20
TXCLKB
N01
GND
N02
GND
N03
GND
N04
GND
N17
GND
N18
GND
N19
GND
N20
GND
P01
N/C
P02
N/C
P03
N/C
P04
N/C
P17
TXDB[5]
P18
TXDB[4]
P19
TXDB[3]
P20
TXDB[2]
R01
N/C
R02
N/C
R03 TXPERD
R04
TXOPD
R17
TXDB[1]
R18
TXDB[0]
R19
TXOPB
R20
TXPERB
T01
VCC
T02
VCC
T03
VCC
T04
VCC
Signal Type
NO CONNECT
LVTTL IN PD
LVTTL IN
NO CONNECT
NO CONNECT
NO CONNECT
LVTTL IN
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN PD
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
NO CONNECT
NO CONNECT
LVTTL OUT
LVTTL IN PU
LVTTL IN
LVTTL IN
LVTTL IN PU
LVTTL OUT
POWER
POWER
POWER
POWER
Ball
ID Signal Name
T17
VCC
T18
VCC
T19
VCC
T20
VCC
U01
TXDD[0]
U02
TXDD[1]
U03
TXDD[2]
U04 TXCTD[1]
U05
VCC
U06
N/C
U07
N/C
U08
GND
U09
N/C
U10
N/C
U11 REFCLK–
U12
TXDA[1]
U13
GND
U14
TXDA[4]
U15 TXCTA[0]
U16
VCC
U17
N/C
U18
N/C
U19
N/C
U20
N/C
V01
TXDD[3]
V02
TXDD[4]
V03 TXCTD[0]
V04
N/C
V05
VCC
V06
N/C
V07
N/C
V08
GND
V09
N/C
V10
N/C
V11 REFCLK+
V12
N/C
V13
GND
V14
TXDA[3]
V15
TXDA[7]
V16
VCC
V17
N/C
V18
N/C
V19
N/C
Signal Type
POWER
POWER
POWER
POWER
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
POWER
NO CONNECT
NO CONNECT
GROUND
NO CONNECT
NO CONNECT
PECL IN
LVTTL IN
GROUND
LVTTL IN
LVTTL IN
POWER
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
LVTTL IN
LVTTL IN
LVTTL IN
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
NO CONNECT
NO CONNECT
PECL IN
NO CONNECT
GROUND
LVTTL IN
LVTTL IN
POWER
NO CONNECT
NO CONNECT
NO CONNECT
Ball
ID
V20
W01
W02
W03
W04
W05
W06
W07
W08
W09
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
Y01
Y02
Y03
Y04
Y05
Y06
Y07
Y08
Y09
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Signal Name
N/C
TXDD[5]
TXDD[7]
N/C
N/C
VCC
N/C
N/C
GND
TXCLKO–
TXRST
TXOPA
SCSEL
GND
TXDA[2]
TXDA[6]
VCC
N/C
N/C
N/C
N/C
TXDD[6]
TXCLKD
N/C
N/C
VCC
N/C
N/C
GND
TXCLKO+
N/C
TXCLKA
TXPERA
GND
TXDA[0]
TXDA[5]
VCC
TXCTA[1]
N/C
N/C
N/C
Signal Type
NO CONNECT
LVTTL IN
LVTTL IN
NO CONNECT
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
LVTTL OUT
LVTTL IN PU
LVTTL IN PU
LVTTL IN PD
GROUND
LVTTL IN
LVTTL IN
POWER
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
LVTTL IN
LVTTL IN
NO CONNECT
NO CONNECT
POWER
NO CONNECT
NO CONNECT
GROUND
LVTTL OUT
NO CONNECT
LVTTL IN PD
LVTTL OUT
GROUND
LVTTL IN
LVTTL IN
POWER
LVTTL IN
NO CONNECT
NO CONNECT
NO CONNECT
Document #: 38-02112 Rev. **
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