CYP15G0401RB Datasheet, PDF (21/35 Pages) Cypress Semiconductor – Quad HOTLink II™ Receiver

PRELIMINARY
CYP15G0401RB
CYP15G0401RB DC Electrical Characteristics Over the Operating Range (continued)
Parameter
V_ILE
I_IHE
I_ILE
V_COM ^{[15, 16]}
Description
Lowest Input LOW Voltage
Input HIGH Current
Input LOW Current
Common Mode Input Range
Test Conditions
V_IN = V_IHE Max.
V_IN = V_ILE Min.
Min.
Max.
V_CC – 2.0
1350
–700
V_CC – 1.95 V_CC – 0.05
Unit
V
µA
µA
V
Power Supply
Parameter
Description
I_CC
Power Supply Current
TRGCLK = Max.
I_CC
Power Supply Current
TRGCLK = 125 MHz
Test Conditions
Commercial
Industrial
Commercial
Industrial
Typ.^[17]
660
640
Max.^[18]
690
740
650
700
Unit
mA
mA
mA
mA
Test Loads and Waveforms
3.3V
R1
R1 = 590Ω
R2 = 435Ω
C_L ≤ 7 pF
C_L
(Includes fixture and
R2
probe capacitance)
(a) LVTTL Output Test Load ^[19]
3.0V
V_th = 1.4V
GND
2.0V
0.8V
2.0V
0.8V
V_th = 1.4V
≤ 1 ns
≤ 1 ns
[20]
(b) LVTTL Input Test Waveform
V_IHE
V_ILE
20%
≤ 270 ps
80%
V_IHE
80%
V_ILE
20%
≤ 270 ps
(c) CML/LVPECL Input Test Waveform
CYP15G0401RB AC Characteristics Over the Operating Range
Parameter
Description
Min.
Max. Unit
CYP15G0401RB Receiver LVTTL Switching Characteristics Over the Operating Range
f_RS
t_RXCLKP
t_RXCLKH
t_RXCLKL
RXCLKx Clock Output Frequency
RXCLKx Period
RXCLKx HIGH Time (RXRATE = LOW)
RXCLKx HIGH Time (RXRATE = HIGH)
RXCLKx LOW Time (RXRATE = LOW)
RXCLKx LOW Time (RXRATE = HIGH)
9.75
6.66
2.33 ^[21]
5.66
2.33 ^[21]
5.66
150
102.56
26.64
52.28
26.64
52.28
MHz
ns
ns
ns
ns
ns
t_RXCLKD
t_RXCLKR ^[21]
t_RXCLKF ^[21]
RXCLKx Duty Cycle centered at 50%
RXCLKx Rise Time
RXCLKx Fall Time
–1.0
+1.0
ns
0.3
1.2
ns
0.3
1.2
ns
Notes:
15. The common mode range defines the allowable range of INPUT+ and INPUT− when INPUT+ = INPUT−. This marks the zero-crossing between the true and
complement inputs as the signal switches between a logic-1 and a logic-0.
16. Not applicable for AC-coupled interfaces. For AC-coupled interfaces, V_DIFFS requirement still needs to be satisfied.
17. Maximum I_CC is measured with V_CC = MAX, RXCKSEL = LOW, with all TX and RX channels and Serial Line Drivers enabled, sending a continuous alternating
01 pattern to the associated receive channel, and outputs unloaded.
18. Typical I_CC is measured under similar conditions except with V_CC = 3.3V, T_A = 25°C, RXCKSEL = LOW, with all RX channels enabled receiving a continuous
alternating 01 pattern to the associated receive channel. The redundant outputs on each channel are powered down and the parallel outputs are unloaded.
19. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only. 5-pF differential load reflects tester capacitance,
and is recommended at low data rates only.
20. The LVTTL switching threshold is 1.4V. All timing references are made relative to the point where the signal edges crosses the threshold voltage.
21. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
Document #: 38-02111 Rev. **
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