CY7C1461AV33_06 Datasheet, PDF (20/29 Pages) Cypress Semiconductor – 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL™ Architecture

CY7C1461AV33
CY7C1463AV33
CY7C1465AV33
Capacitance^[18]
Parameter
Description
C_IN
C_CLK
C_I/O
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Thermal Resistance^[18]
Test Conditions
T_A = 25°C, f = 1 MHz,
V_DD = 3.3V
V_DDQ = 2.5V
100 TQFP
Max.
6.5
3
5.5
165 FBGA 209 FBGA
Max.
Max.
7
5
7
5
6
7
Parameter
Θ_JA
Θ_JC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Test conditions follow standard
test methods and procedures
for measuring thermal
impedance, per EIA/JESD51.
100 TQFP
Package
25.21
2.28
165 FBGA 209 FBGA
Package Package
20.8
25.31
3.2
4.48
AC Test Loads and Waveforms
Unit
pF
pF
pF
Unit
°C/W
°C/W
3.3V I/O Test Load
OUTPUT
3.3V
Z₀ = 50Ω
OUTPUT
R_L = 50Ω
5 pF
INCLUDING
V_T = 1.5V
(a)
JIG AND
SCOPE
R = 317Ω
R = 351Ω
(b)
V_DDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
(c)
2.5V I/O Test Load
OUTPUT
2.5V
Z₀ = 50Ω
OUTPUT
R_L = 50Ω
5 pF
V_T = 1.25V
INCLUDING
JIG AND
(a)
SCOPE
R = 1667Ω
R = 1538Ω
V_DDQ
GND
10%
≤ 1ns
ALL INPUT PULSES
90%
(b)
(c)
Note:
18. Tested initially and after any design or process change that may affect these parameters.
90%
10%
≤ 1ns
90%
10%
≤ 1ns
Document #: 38-05356 Rev. *E
Page 20 of 29
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